diff --git a/boards/arm/lpcxpresso55s69/CMakeLists.txt b/boards/arm/lpcxpresso55s69/CMakeLists.txt new file mode 100644 index 00000000000000..b748498d01629e --- /dev/null +++ b/boards/arm/lpcxpresso55s69/CMakeLists.txt @@ -0,0 +1,11 @@ +# +# Copyright (c) 2019, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_PINMUX_MCUX_LPC) + zephyr_library() + zephyr_library_include_directories(${ZEPHYR_BASE}/drivers) + zephyr_library_sources(pinmux.c) +endif() diff --git a/boards/arm/lpcxpresso55s69/Kconfig.board b/boards/arm/lpcxpresso55s69/Kconfig.board new file mode 100644 index 00000000000000..172c2e095a299c --- /dev/null +++ b/boards/arm/lpcxpresso55s69/Kconfig.board @@ -0,0 +1,16 @@ +# Kconfig - LPCXpresso55S69 board +# +# Copyright (c) 2019, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +config BOARD_LPCXPRESSO55S69_CPU0 + bool "NXP LPCXPRESSO-55S69 [CPU0]" + depends on SOC_SERIES_LPC55XXX + select SOC_PART_NUMBER_LPC55S69JBD100 + +config BOARD_LPCXPRESSO55S69_CPU1 + bool "NXP LPCXPRESSO-55S69 [CPU1]" + depends on SOC_SERIES_LPC55XXX + select SOC_PART_NUMBER_LPC55S69JBD100 diff --git a/boards/arm/lpcxpresso55s69/Kconfig.defconfig b/boards/arm/lpcxpresso55s69/Kconfig.defconfig new file mode 100644 index 00000000000000..021e51ec0007fa --- /dev/null +++ b/boards/arm/lpcxpresso55s69/Kconfig.defconfig @@ -0,0 +1,41 @@ +# Kconfig - LPCXpresso55S69 board +# +# Copyright (c) 2019, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if BOARD_LPCXPRESSO55S69_CPU0 || BOARD_LPCXPRESSO55S69_CPU1 + +config BOARD + default "lpcxpresso55S69_cpu0" if BOARD_LPCXPRESSO55S69_CPU0 + default "lpcxpresso55S69_cpu1" if BOARD_LPCXPRESSO55S69_CPU1 + +if USART_MCUX_LPC + +config USART_MCUX_LPC_0 + default y if UART_CONSOLE + +endif # USART_MCUX_LPC + +if PINMUX_MCUX_LPC + +config PINMUX_MCUX_LPC_PORT0 + default y + +config PINMUX_MCUX_LPC_PORT1 + default y + +endif # PINMUX_MCUX_LPC + +if GPIO_MCUX_LPC + +config GPIO_MCUX_LPC_PORT0 + default y + +config GPIO_MCUX_LPC_PORT1 + default y + +endif # GPIO_MCUX_LPC + +endif # BOARD_LPCXPRESSO55S69_CPU0 || BOARD_LPCXPRESSO55S69_CPU1 diff --git a/boards/arm/lpcxpresso55s69/board.cmake b/boards/arm/lpcxpresso55s69/board.cmake new file mode 100644 index 00000000000000..2967158a78b746 --- /dev/null +++ b/boards/arm/lpcxpresso55s69/board.cmake @@ -0,0 +1,25 @@ +# +# Copyright (c) 2019, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + + +## DAP Link implementation in pyocd is underway, +## until then jlink can be used or copy image to storage + +set_ifndef(OPENSDA_FW jlink) + +if(OPENSDA_FW STREQUAL jlink) + set_ifndef(BOARD_DEBUG_RUNNER jlink) + set_ifndef(BOARD_FLASH_RUNNER jlink) +endif() + +if(CONFIG_BOARD_LPCXPRESSO55S69_CPU0) +board_runner_args(jlink "--device=LPC55S69_core0") +endif() +if(CONFIG_BOARD_LPCXPRESSO55S69_CPU1) +board_runner_args(jlink "--device=LPC55S69_core1") +endif() + +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/lpcxpresso55s69/doc/index.rst b/boards/arm/lpcxpresso55s69/doc/index.rst new file mode 100644 index 00000000000000..39474ed1a8fd40 --- /dev/null +++ b/boards/arm/lpcxpresso55s69/doc/index.rst @@ -0,0 +1,206 @@ +.. _lpcxpresso55s69: + +NXP LPCXPRESSO55S69 +################### + +Overview +******** + +The LPCXpresso55S69 development board provides the ideal platform for evaluation +of and development with the LPC55S6x MCU based on the Arm® Cortex®-M33 +architecture. The board includes a high performance onboard debug probe, audio +subsystem, and accelerometer, with several options for adding off-the-shelf +add-on boards for networking, sensors, displays, and other interfaces. + +.. image:: ./lpcxpresso55s69.png + :width: 720px + :align: center + :alt: LPCXPRESSO55S69 + +Hardware +******** + +- LPC55S69 dual core Arm Cortex-M33 microcontroller running at up to 100 MHz +- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP and SEGGER J-Link + protocol options +- UART and SPI port bridging from LPC55S69 target to USB via the onboard debug + probe +- Hardware support for external debug probe +- 3 x user LEDs, plus Reset, ISP (3) and user buttons +- Micro SD card slot (4-bit SDIO) +- NXP MMA8652FCR1 accelerometer +- Stereo audio codec with line in/out +- High and full speed USB ports with micro A/B connector for host or device + functionality +- MikroEletronika Click expansion option +- LPCXpresso-V3 expansion option compatible with Arduino UNO +- PMod compatible expansion / host connector + +For more information about the LPC55S69 SoC and LPCXPRESSO55S69 board, see: + +- `LPC55S69 SoC Website`_ +- `LPC55S69 Datasheet`_ +- `LPC55S69 Reference Manual`_ +- `LPCXPRESSO55S69 Website`_ +- `LPCXPRESSO55S69 User Guide`_ +- `LPCXPRESSO55S69 Schematics`_ + +Supported Features +================== + +The lpcxpresso55s69 board configuration supports the following hardware +features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| IOCON | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| USART | on-chip | serial port-polling | ++-----------+------------+-------------------------------------+ + +The default configuration file +``boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0_defconfig`` +only enables the first core. + +Other hardware features are not currently supported by the port. + +Connections and IOs +=================== + +The LPC55S69 SoC has IOCON registers, which can be used to configure the +functionality of a pin. + ++---------+-----------------+----------------------------+ +| Name | Function | Usage | ++=========+=================+============================+ +| PIO0_29 | USART | USART RX | ++---------+-----------------+----------------------------+ +| PIO0_30 | USART | USART TX | ++---------+-----------------+----------------------------+ +| PIO1_4 | GPIO | RED LED | ++---------+-----------------+----------------------------+ +| PIO1_6 | GPIO | BLUE_LED | ++---------+-----------------+----------------------------+ +| PIO1_7 | GPIO | GREEN LED | ++---------+-----------------+----------------------------+ + +System Clock +============ + +The LPC55S69 SoC is configured to use the internal FRO at 96MHz as a source for +the system clock. Other sources for the system clock are provided in the SOC, +depending on your system requirements. + +Serial Port +=========== + +The LPC55S69 SoC has 8 FLEXCOMM interfaces for serial communication. One is +configured as USART for the console and the remaining are not used. + +Programming and Debugging +************************* + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Configuring a Debug Probe +========================= + +A debug probe is used for both flashing and debugging the board. This board is +configured by default to use the LPC-Link2 CMSIS-DAP Onboard Debug Probe, +however the :ref:`pyocd-debug-host-tools` does not yet support this probe so you +must reconfigure the board for one of the following debug probes instead. + +:ref:`lpclink2-jlink-onboard-debug-probe` +----------------------------------------- + +Install the :ref:`jlink-debug-host-tools` and make sure they are in your search +path. + +Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program +the J-Link firmware. Please make sure you have the latest firmware for this +board. + +:ref:`opensda-daplink-onboard-debug-probe` +------------------------------------------ + +PyOCD support for this board is ongoing and not yet available. +To use DAPLink's flash memory programming on this board, follow the instructions +for `updating LPCXpresso firmware`_. + +Configuring a Console +===================== + +Connect a USB cable from your PC to P6, and use the serial terminal of your choice +(minicom, putty, etc.) with the following settings: + +- Speed: 115200 +- Data: 8 bits +- Parity: None +- Stop bits: 1 + +Flashing +======== + +Here is an example for the :ref:`hello_world` application. This example uses the +:ref:`jlink-debug-host-tools` as default. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: lpcxpresso55s69_cpu0 + :goals: flash + +Open a serial terminal, reset the board (press the RESET button), and you should +see the following message in the terminal: + +.. code-block:: console + + ***** Booting Zephyr OS v1.14.0 ***** + Hello World! lpcxpresso55s69_cpu0 + +Debugging +========= + +Here is an example for the :ref:`hello_world` application. This example uses the +:ref:`jlink-debug-host-tools` as default. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: lpcxpresso55s69_cpu0 + :goals: debug + +Open a serial terminal, step through the application in your debugger, and you +should see the following message in the terminal: + +.. code-block:: console + + ***** Booting Zephyr OS zephyr-v1.14.0 ***** + Hello World! lpcxpresso55s69_cpu0 + +.. _LPC55S69 SoC Website: + https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/lpc-cortex-m-mcus/lpc5500-cortex-m33/high-efficiency-arm-cortex-m33-based-microcontroller-family:LPC55S6x + +.. _LPC55S69 Datasheet: + https://www.nxp.com/docs/en/data-sheet/LPC55S6x.pdf + +.. _LPC55S69 Reference Manual: + https://www.nxp.com/docs/en/user-guide/UM11126.pdf + +.. _LPCXPRESSO55S69 Website: + https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/lpc-cortex-m-mcus/lpc5500-cortex-m33/lpcxpresso55s69-development-board:LPC55S69-EVK + +.. _LPCXPRESSO55S69 User Guide: + https://www.nxp.com/webapp/Download?colCode=UM11158 + +.. _LPCXPRESSO55S69 Schematics: + https://www.nxp.com/webapp/Download?colCode=LPC55S69-SCH + +.. _updating LPCXpresso firmware: + https://os.mbed.com/teams/NXP/wiki/Updating-LPCXpresso-firmware diff --git a/boards/arm/lpcxpresso55s69/doc/lpcxpresso55s69.png b/boards/arm/lpcxpresso55s69/doc/lpcxpresso55s69.png new file mode 100644 index 00000000000000..60abcc08581917 Binary files /dev/null and b/boards/arm/lpcxpresso55s69/doc/lpcxpresso55s69.png differ diff --git a/boards/arm/lpcxpresso55s69/lpcxpresso55s69.dtsi b/boards/arm/lpcxpresso55s69/lpcxpresso55s69.dtsi new file mode 100644 index 00000000000000..c43e85035b705a --- /dev/null +++ b/boards/arm/lpcxpresso55s69/lpcxpresso55s69.dtsi @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2019, NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases{ + usart-0 = &usart0; + led0 = &red_led; + led1 = &green_led; + led2 = &blue_led; + }; + + leds { + compatible = "gpio-leds"; + green_led: led_1 { + gpios = <&gpio1 7 0>; + label = "User LD2"; + status = "disabled"; + }; + blue_led: led_2 { + gpios = <&gpio1 4 0>; + label = "User LD3"; + status = "disabled"; + }; + red_led: led_3 { + gpios = <&gpio1 6 0>; + label = "User LD4"; + status = "disabled"; + }; + }; +}; diff --git a/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.dts b/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.dts new file mode 100644 index 00000000000000..6b23d5de8c414b --- /dev/null +++ b/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.dts @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2019, NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "lpcxpresso55s69.dtsi" + +/ { + model = "NXP LPCXpresso55S69 board"; + compatible = "nxp,lpc55xxx", "nxp,lpc"; + + aliases{ + sw0 = &user_button_1; + sw1 = &user_button_2; + sw2 = &user_button_3; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button_1: button_0 { + label = "User SW1"; + gpios = <&gpio0 5 GPIO_INT_ACTIVE_LOW>; + }; + user_button_2: button_1 { + label = "User SW2"; + gpios = <&gpio1 18 GPIO_INT_ACTIVE_LOW>; + }; + user_button_3: button_2 { + label = "User SW3"; + gpios = <&gpio1 9 GPIO_INT_ACTIVE_LOW>; + }; + }; +}; + +&usart0 { + status = "ok"; + current-speed = <115200>; +}; + +&gpio0 { + status = "ok"; +}; + +&gpio1 { + status = "ok"; +}; + +&green_led { + status = "ok"; +}; + +&blue_led { + status = "ok"; +}; + +&red_led { + status = "ok"; +}; diff --git a/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.yaml b/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.yaml new file mode 100644 index 00000000000000..10d6b49ec594d4 --- /dev/null +++ b/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.yaml @@ -0,0 +1,18 @@ +# +# Copyright (c) 2019, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: lpcxpresso55s69_cpu0 +name: NXP LPCXpresso55S69 +type: mcu +arch: arm +ram: 64 +flash: 256 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio diff --git a/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0_defconfig b/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0_defconfig new file mode 100644 index 00000000000000..1f0435054c3894 --- /dev/null +++ b/boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0_defconfig @@ -0,0 +1,16 @@ +# +# Copyright (c) 2019, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_ARM=y +CONFIG_SOC_SERIES_LPC55XXX=y +CONFIG_BOARD_LPCXPRESSO55S69_CPU0=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_GPIO=y +CONFIG_PINMUX=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000 diff --git a/boards/arm/lpcxpresso55s69/pinmux.c b/boards/arm/lpcxpresso55s69/pinmux.c new file mode 100644 index 00000000000000..c0c49ba3eeb232 --- /dev/null +++ b/boards/arm/lpcxpresso55s69/pinmux.c @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2019, NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include + +static int lpcxpresso_55s69_pinmux_init(struct device *dev) +{ + ARG_UNUSED(dev); + +#ifdef CONFIG_PINMUX_MCUX_LPC_PORT0 + struct device *port0 = + device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT0_NAME); +#endif + +#ifdef CONFIG_PINMUX_MCUX_LPC_PORT1 + struct device *port1 = + device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME); +#endif + +#ifdef CONFIG_USART_MCUX_LPC_0 + /* USART0 RX, TX */ + const u32_t port0_pin29_config = ( + IOCON_PIO_FUNC1 | + IOCON_PIO_MODE_INACT | + IOCON_PIO_INV_DI | + IOCON_PIO_DIGITAL_EN | + IOCON_PIO_SLEW_STANDARD | + IOCON_PIO_OPENDRAIN_DI + ); + + const u32_t port0_pin30_config = ( + IOCON_PIO_FUNC1 | + IOCON_PIO_MODE_INACT | + IOCON_PIO_INV_DI | + IOCON_PIO_DIGITAL_EN | + IOCON_PIO_SLEW_STANDARD | + IOCON_PIO_OPENDRAIN_DI + ); + + pinmux_pin_set(port0, 29, port0_pin29_config); + pinmux_pin_set(port0, 30, port0_pin30_config); + +#endif + +#ifdef CONFIG_GPIO_MCUX_LPC_PORT0 + const u32_t port0_pin5_config = ( + IOCON_PIO_FUNC0 | + IOCON_PIO_MODE_PULLUP | + IOCON_PIO_INV_DI | + IOCON_PIO_DIGITAL_EN | + IOCON_PIO_INPFILT_OFF | + IOCON_PIO_SLEW_STANDARD | + IOCON_PIO_OPENDRAIN_DI + ); + + pinmux_pin_set(port0, 5, port0_pin5_config); +#endif + +#ifdef CONFIG_GPIO_MCUX_LPC_PORT0 + const u32_t port1_pin18_config = ( + IOCON_PIO_FUNC0 | + IOCON_PIO_MODE_PULLUP | + IOCON_PIO_INV_DI | + IOCON_PIO_DIGITAL_EN | + IOCON_PIO_INPFILT_OFF | + IOCON_PIO_SLEW_STANDARD | + IOCON_PIO_OPENDRAIN_DI + ); + + pinmux_pin_set(port1, 18, port1_pin18_config); + + const u32_t port1_pin9_config = ( + IOCON_PIO_FUNC0 | + IOCON_PIO_MODE_PULLUP | + IOCON_PIO_INV_DI | + IOCON_PIO_DIGITAL_EN | + IOCON_PIO_INPFILT_OFF | + IOCON_PIO_SLEW_STANDARD | + IOCON_PIO_OPENDRAIN_DI + ); + + pinmux_pin_set(port1, 9, port1_pin9_config); +#endif + + return 0; +} + +SYS_INIT(lpcxpresso_55s69_pinmux_init, PRE_KERNEL_1, + CONFIG_PINMUX_INIT_PRIORITY);