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stm32: pinmux: spi: Opt for lower power consumption

Fixes #16739. Changed the STM32's SPI MISO/MOSI configurations in order
to reduce the power consumption by approximately 20uA per pin.

According to STM32's Application Notes on GPIO configuration for
low-power consumption, the input pins should be configured with internal
pull-up or pull-down resistor. If a pin is configured as a floating
input, and there is no signal present, the Schmitt trigger randomly
toggles between the logical levels induced by the external noise, thus
increasing the consumption.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
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gon1332 authored and galak committed Jul 29, 2019
1 parent af9a267 commit dca08c95dd3634b0e1838d46021680716e8feff8
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017 RnDity Sp. z o.o.
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -64,29 +65,29 @@
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F0_PINMUX_FUNC_PA6_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

#define STM32F0_PINMUX_FUNC_PA15_SPI1_NSS \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
#define STM32F0_PINMUX_FUNC_PB3_SPI1_SCK \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F0_PINMUX_FUNC_PB4_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32F0_PINMUX_FUNC_PB5_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

#define STM32F0_PINMUX_FUNC_PB12_SPI2_NSS \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
#define STM32F0_PINMUX_FUNC_PB13_SPI2_SCK \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F0_PINMUX_FUNC_PB14_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

/* Available on STM32F030xC devices only. */
#define STM32F0_PINMUX_FUNC_PB9_SPI2_NSS \
@@ -95,9 +96,9 @@
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F0_PINMUX_FUNC_PC2_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32F0_PINMUX_FUNC_PC3_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

#define STM32F0_PINMUX_FUNC_PB8_CAN_RX \
(STM32_PINMUX_ALT_FUNC_4 | STM32_PUSHPULL_NOPULL)
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017 RnDity Sp. z o.o.
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -90,9 +91,9 @@
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F3_PINMUX_FUNC_PA6_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F3_PINMUX_FUNC_PA8_PWM1_CH1 \
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL)

@@ -119,9 +120,9 @@
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F3_PINMUX_FUNC_PB14_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#if CONFIG_SOC_STM32F302X8 || CONFIG_SOC_STM32F303XC || CONFIG_SOC_STM32F373XC
#define STM32F3_PINMUX_FUNC_PA15_SPI3_NSS \
@@ -130,9 +131,9 @@
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F3_PINMUX_FUNC_PB4_SPI3_MISO \
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUPDR_PULL_DOWN)
#define STM32F3_PINMUX_FUNC_PB5_SPI3_MOSI \
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUPDR_PULL_DOWN)
#endif

#define STM32F3_PINMUX_FUNC_PF2_ADC12_IN10 \
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016 Linaro Limited.
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -78,12 +79,12 @@
STM32_MODER_ANALOG_MODE

#define STM32F4_PINMUX_FUNC_PA6_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F4_PINMUX_FUNC_PA6_ADC12_IN6 \
STM32_MODER_ANALOG_MODE

#define STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F4_PINMUX_FUNC_PA7_I2S1_SD \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
#define STM32F4_PINMUX_FUNC_PA7_ETH \
@@ -166,7 +167,7 @@
#define STM32F4_PINMUX_FUNC_PB4_I2C3_SDA \
(STM32_PINMUX_ALT_FUNC_9 | STM32_OPENDRAIN_PULLUP)
#define STM32F4_PINMUX_FUNC_PB4_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F4_PINMUX_FUNC_PB5_I2S3_SD \
(STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL)
@@ -176,7 +177,7 @@
(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F4_PINMUX_FUNC_PB6_PWM4_CH1 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL)
@@ -263,14 +264,14 @@
STM32_OSPEEDR_VERY_HIGH_SPEED)

#define STM32F4_PINMUX_FUNC_PB14_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F4_PINMUX_FUNC_PB14_USART3_RTS \
(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32F4_PINMUX_FUNC_PB14_OTG_HS_DM \
(STM32_PINMUX_ALT_FUNC_12 | STM32_PUSHPULL_NOPULL)

#define STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F4_PINMUX_FUNC_PB15_I2S2_SD \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
#define STM32F4_PINMUX_FUNC_PB15_OTG_HS_DP \
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018 Yurii Hamann
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -94,7 +95,7 @@
#define STM32F7_PINMUX_FUNC_PA6_PWM13_CH1 \
(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PA6_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PA6_LTDC_G2 \
(STM32_PINMUX_ALT_FUNC_14 | STM32_PUSHPULL_NOPULL)
#define STM32F7_PINMUX_FUNC_PA6_ADC12_IN6 \
@@ -112,7 +113,7 @@
#define STM32F7_PINMUX_FUNC_PA7_PWM14_CH1 \
(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PA7_ADC12_IN7 \
STM32_MODER_ANALOG_MODE

@@ -189,14 +190,14 @@
#define STM32F7_PINMUX_FUNC_PB4_PWM3_CH1 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB4_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PB4_SPI2_NSS \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)

#define STM32F7_PINMUX_FUNC_PB5_PWM3_CH2 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB5_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F7_PINMUX_FUNC_PB6_PWM4_CH1 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_PULLUP)
@@ -279,7 +280,7 @@
#define STM32F7_PINMUX_FUNC_PB14_PWM12_CH1 \
(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB14_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F7_PINMUX_FUNC_PB15_PWM1_CH3N \
(STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_PULLUP)
@@ -288,13 +289,13 @@
#define STM32F7_PINMUX_FUNC_PB15_PWM12_CH2 \
(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F7_PINMUX_FUNC_PB14_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

/* Port C */
#define STM32F7_PINMUX_FUNC_PC0_LTDC_R5 \
@@ -306,17 +307,17 @@
(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F7_PINMUX_FUNC_PC1_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PC1_ADC123_IN11 \
STM32_MODER_ANALOG_MODE

#define STM32F7_PINMUX_FUNC_PC2_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PC2_ADC123_IN12 \
STM32_MODER_ANALOG_MODE

#define STM32F7_PINMUX_FUNC_PC3_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PC3_ADC123_IN13 \
STM32_MODER_ANALOG_MODE

@@ -670,12 +671,12 @@
#define STM32F7_PINMUX_FUNC_PI2_PWM8_CH4 \
(STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PI2_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32F7_PINMUX_FUNC_PI2_LTDC_G7 \
(STM32_PINMUX_ALT_FUNC_14 | STM32_PUSHPULL_NOPULL)

#define STM32F7_PINMUX_FUNC_PI3_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)

#define STM32F7_PINMUX_FUNC_PI4_LTDC_B4 \
(STM32_PINMUX_ALT_FUNC_14 | STM32_PUSHPULL_NOPULL)
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018 Ilya Tagunov
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -74,39 +75,39 @@
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L0_PINMUX_FUNC_PA6_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

#define STM32L0_PINMUX_FUNC_PA15_SPI1_NSS \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
#define STM32L0_PINMUX_FUNC_PB3_SPI1_SCK \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L0_PINMUX_FUNC_PB4_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32L0_PINMUX_FUNC_PB5_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

#define STM32L0_PINMUX_FUNC_PB12_SPI2_NSS \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
#define STM32L0_PINMUX_FUNC_PB13_SPI2_SCK \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L0_PINMUX_FUNC_PB14_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)
#define STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_PULL_DOWN)

#define STM32L0_PINMUX_FUNC_PB9_SPI2_NSS \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
#define STM32L0_PINMUX_FUNC_PB10_SPI2_SCK \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L0_PINMUX_FUNC_PC2_SPI2_MISO \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUPDR_PULL_DOWN)
#define STM32L0_PINMUX_FUNC_PC3_SPI2_MOSI \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUPDR_PULL_DOWN)

#define STM32L0_PINMUX_FUNC_PC0_ADC_IN10 \
STM32_MODER_ANALOG_MODE
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2019 Linaro Ltd.
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -33,9 +34,9 @@
#define STM32L1X_PINMUX_FUNC_PA5_SPI1_SCK \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
#define STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32L1X_PINMUX_FUNC_PA7_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32L1X_PINMUX_FUNC_PA9_USART1_TX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32L1X_PINMUX_FUNC_PA10_USART1_RX \
@@ -59,11 +60,11 @@
#define STM32L1X_PINMUX_FUNC_PB4_PWM3_CH1 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL)
#define STM32L1X_PINMUX_FUNC_PB4_SPI1_MISO \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32L1X_PINMUX_FUNC_PB5_PWM3_CH2 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL)
#define STM32L1X_PINMUX_FUNC_PB5_SPI1_MOSI \
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL)
(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32L1X_PINMUX_FUNC_PB6_PWM4_CH1 \
(STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL)
#define STM32L1X_PINMUX_FUNC_PB6_I2C1_SCL \

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