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dts: x86: Move ioapic node out of cpu container

The IOAPIC node shouldn't have been in the cpu container, especially
since the cpu container does:

	#address-cells = <1>;
	#size-cells = <0>;

So the reg field of the IOAPIC would be treated as 2 registers instead
of a register and size.  Move IOAPIC node out of the CPU node fixes this
issue.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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galak authored and nashif committed May 21, 2019
1 parent 704b460 commit e7cc51094af1d7d073b0911a14f9b05c9dbf88bb
Showing with 25 additions and 27 deletions.
  1. +6 −6 dts/x86/apollo_lake.dtsi
  2. +6 −7 dts/x86/atom.dtsi
  3. +7 −7 dts/x86/intel_curie.dtsi
  4. +6 −7 dts/x86/quark_x1000.dtsi
@@ -20,12 +20,6 @@
reg = <0>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};
};

flash0: flash@100000{
@@ -39,6 +33,12 @@
reg = <0x00400000 DT_SRAM_SIZE>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};

soc {
#address-cells = <1>;
@@ -17,13 +17,6 @@
compatible = "atom";
reg = <0>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};
};

flash0: flash@100000{
@@ -37,6 +30,12 @@
reg = <0x00400000 DT_SRAM_SIZE>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};

soc {
#address-cells = <1>;
@@ -25,13 +25,6 @@
compatible = "arc";
reg = <1>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};
};

flash0: flash@40010000 {
@@ -50,6 +43,13 @@
reg = <0xa8007000 DT_SRAM_SIZE>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};

soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -19,13 +19,6 @@
compatible = "quark_x1000";
reg = <0>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};
};

flash0: flash@100000{
@@ -39,6 +32,12 @@
reg = <0x00400000 DT_SRAM_SIZE>;
};

intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};

soc {
#address-cells = <1>;

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