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dts: STM32H747 basic device tree description

Initiate stm32h7 device tree description, with stm32h747 single core
configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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erwango authored and nashif committed Jun 19, 2019
1 parent ef35fbc commit ecd23f4fa3cbeb51b4cf594ed8b91ce3d53eafa3
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/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>

/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m7";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;

mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <1>;
};
};

soc {
flash-controller@52002000 {
compatible = "st,stm32h7-flash-controller";
label = "FLASH_CTRL";
reg = <0x52002000 0x400>;
interrupts = <4 0>;

#address-cells = <1>;
#size-cells = <1>;
};

rcc: rcc@58024400 {
compatible = "st,stm32-rcc";
#clock-cells = <2>;
reg = <0x58024400 0x400>;
label = "STM32_CLK_RCC";
};
};
};

&nvic {
arm,num-irq-priority-bits = <4>;
};
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/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <st/h7/stm32h7.dtsi>
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/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <mem.h>
#include <st/h7/stm32h747.dtsi>

/ {
cpus {
/delete-node/ cpu@1;
};

/* system data RAM accessible over over AXI bus */
sram0: memory@24000000 {
device_type = "memory";
reg = <0x24000000 DT_SIZE_K(512)>;
compatible = "mmio-sram";
};

soc {
flash-controller@52002000 {
flash0: flash@8000000 {
reg = <0x08000000 DT_SIZE_K(1024)>;
};
};
};
};
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---
title: STM32 H7 Flash Controller
version: 0.1

description: >
This binding gives a base representation of the STM32 H7 Flash Controller
inherits:
!include flash-controller.yaml

properties:
compatible:
constraint: "st,stm32h7-flash-controller"

...

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