Skip to content
Permalink
Browse files

tests: samples: Apps shouldn't set tick rate

Tick rate is becoming a platform tunable in the tickless world.  Some
apps were setting it due to requirements of drivers or subsystems (or
sometimes for reasons that don't make much sense), but the dependency
goes the other way around now: board/soc/arch level code is
responsible for setting tick rates that work with their devices.

A few tests still use hard-configured tick rates, as they have
baked-in assumptions (like e.g. "a tick will be longer than a
millisecond") that need to be addressed first.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
  • Loading branch information...
andyross authored and nashif committed Jun 11, 2019
1 parent b696c3e commit f288d1e4a73c75938c702736bab73b19b96a4a97
@@ -3,7 +3,6 @@ CONFIG_MAIN_STACK_SIZE=320
CONFIG_IDLE_STACK_SIZE=128
CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
CONFIG_GPIO=y

CONFIG_BT_PERIPHERAL=y
@@ -2,7 +2,6 @@ CONFIG_INIT_STACKS=y
CONFIG_MAIN_STACK_SIZE=512
CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
CONFIG_GPIO=y

@@ -2,7 +2,6 @@
CONFIG_MAIN_STACK_SIZE=512
#CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=1280
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
CONFIG_GPIO=y
CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
@@ -2,4 +2,3 @@
CONFIG_GPIO=y
CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
@@ -1,4 +1,3 @@
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
CONFIG_ISR_STACK_SIZE=1024
CONFIG_BT=y
CONFIG_BT_CENTRAL=y
@@ -3,4 +3,3 @@ CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
CONFIG_PWM=y
CONFIG_PWM_NRF5_SW=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
@@ -1,5 +1,4 @@
CONFIG_STDOUT_CONSOLE=n
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_ASSERT=y
CONFIG_ASSERT_LEVEL=2
CONFIG_NUM_COOP_PRIORITIES=29
@@ -1,4 +1,3 @@
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_ASSERT=y
CONFIG_ASSERT_LEVEL=2
CONFIG_CMSIS_RTOS_V1=y
@@ -1,4 +1,3 @@
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_ASSERT=y
CONFIG_ASSERT_LEVEL=2
CONFIG_CMSIS_RTOS_V1=y
@@ -1,4 +1,3 @@
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_ASSERT=y
CONFIG_ASSERT_LEVEL=2
CONFIG_CMSIS_RTOS_V2=y
@@ -1,4 +1,3 @@
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_ASSERT=y
CONFIG_ASSERT_LEVEL=2
CONFIG_CMSIS_RTOS_V2=y
@@ -3,7 +3,6 @@ CONFIG_INIT_STACKS=y
CONFIG_MAIN_STACK_SIZE=512
CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
CONFIG_GPIO=y

CONFIG_BT=y
@@ -3,7 +3,6 @@ CONFIG_TEST=y
CONFIG_MAIN_STACK_SIZE=512
CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=250
CONFIG_GPIO=y

CONFIG_BT_PERIPHERAL=y
@@ -6,10 +6,6 @@ CONFIG_SPI=y
CONFIG_LOG=y
CONFIG_SENSOR_LOG_LEVEL_DBG=y
CONFIG_TEST_USERSPACE=y

# Some sensor drivers (notably HP206C) demand high tick rates:
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000

CONFIG_ADC=y
CONFIG_ADT7420=y
CONFIG_ADXL362=y
@@ -1,2 +1,5 @@
CONFIG_SYS_POWER_MANAGEMENT=y
CONFIG_ZTEST=y

# The code is written to assume a slow tick rate
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100

0 comments on commit f288d1e

Please sign in to comment.
You can’t perform that action at this time.