ARC: remove tickless idle dependency on SW ISR table #1651
Labels
area: Kernel
Enhancement
Changes/Updates/Additions to existing features
priority: medium
Medium impact/importance bug
Reported by Hirally Santiago:
Current tickless idle implementation depends on the use of the SW ISR table for all interrupts. As a product developer, I may be interested in an application where parameterless ISRs are directly installed in the ISR vector table for performance or footprint reasons. Add support to Zephyr for this. This will probably take the form of macros that need to be put at the beginning and/or end of these special ISRs.
(Imported from Jira ZEP-52)
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