drivers: ethernet: phy: improve generic driver #100185
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maass-hamburg
commented
Nov 27, 2025
maass-hamburg
commented
- reduces unneeded mdio reads for registers with latched bits
- reduces duration from init to link up callback (some phys set the link status up only when auto neg is finished, before this change we waited for 100 ms)
- some other changes, see commit messages
provide the BMSR bits positions, so we can use the `IS_BIT_SET` macro with them. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
let the compiler remove checks for cfg->fixed if we don't have any fixed link. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The latched bits are defined in the ethernet specification, as the only latched bit, that we use, is the link status, improve the code for it. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
auto negotiation might already be finished when we check the link status, therefore check directly instead of waiting 100 ms. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
also set autoneg_in_progress for already on init. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
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pdgendt
approved these changes
Nov 28, 2025
jukkar
approved these changes
Nov 28, 2025
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