Drivers: interrupt: Add NXP GINT driver #100240
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The GINT peripheral provides grouped GPIO interrupt functionality, allowing multiple pins to be combined into a single interrupt source. Support the peripheral in interrupt controller Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Add dts nodes in SOC dts files Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Enable GINT clock during SOC init Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
The test cases cover: 1. Pin enable and disable 2. Edge trigger and level trigger for single pin 3. OR combination and AND combination for multiple pins Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Set the DTS node to okay status Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Enable the test case for NXP boards Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
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The DTS compliance fail needs this fix: #100133 |
zephyrbot
added
area: Devicetree Bindings
area: Tests
zephyrbot
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butok,
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manuargue,
mmahadevan108,
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JarmouniA
changed the title
Holt-Sun
reviewed
Nov 29, 2025
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| /* Clear interrupt flag */ | ||
| ctrl = gint_read_reg(config, GINT_CTRL_OFFSET); | ||
| gint_write_reg(config, GINT_CTRL_OFFSET, ctrl); |
Contributor
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Should we firstly check if (ctrl & GINT_CTRL_INT_BIT), then gint_write_reg(config, GINT_CTRL_OFFSET, ctrl); to clear the flag?
| { | ||
| atomic_inc(&gint_callback_count); | ||
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| nxp_gint_disable_pin(gint_dev, TEST_PORT_0, TEST_PIN_0); |
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Disable the same port pin twice.
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Add NXP GINT driver
Add the test
Enable driver and test for NXP boards