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Add support for Enclustra Mercury XU* modules #18841

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commented Sep 2, 2019

This PR adds suport for the Cortex R5 CPU in the Xilinx Zynq MP SoC on Enclustra's Mercury XU* Modules.

It also adds possibility to disable ECC checking in the Cortex R Tightly Coupled Memory (TCM)


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commented Sep 2, 2019

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@kgugala kgugala force-pushed the antmicro:mercury-suppport branch 2 times, most recently from 3a6674b to ae9b82e Sep 2, 2019

@kgugala kgugala requested a review from wjliang as a code owner Sep 4, 2019

wsipak added 4 commits Aug 29, 2019
arch: arm: cortex_r: disable ECC on TCMs
This commit adds possibility to disable ECC in Tightly Coupled
Memory in Cortex-R.
Linker scripts places stacks in this memory and marks it as
.noinit section. With ECC enabled, stack read accesses without
previous write result in Data Abort Exception.

Signed-off-by: Wojciech Sipak <>
dts: arm: fix addresses of zynqmp gic
The addresses are incorrect. According to the ZynqMP's TRM
0xF9010000 is the base address of an interrupt controller for
Cortex-A53 and 0xF9000000 is the address of interrupt controller
for Cortex-R5

Signed-off-by: Wojciech Sipak <>
boards: arm: add suport for Enclustra Mercury XU boards
This commit adds support for Enclustra's boards with ZynqMP SoC

Signed-off-by: Wojciech Sipak <>
drivers: timer: add dummy functions to xlnx timer
This commit adds dummy functions for tickless kernel api
in xlnx_psttc_timer driver.

Signed-off-by: Wojciech Sipak <>

@kgugala kgugala force-pushed the antmicro:mercury-suppport branch from ae9b82e to b8f49fa Sep 9, 2019

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