Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add support for Enclustra Mercury XU* modules #18841

Open
wants to merge 4 commits into
base: master
from

Conversation

@kgugala
Copy link
Collaborator

commented Sep 2, 2019

This PR adds suport for the Cortex R5 CPU in the Xilinx Zynq MP SoC on Enclustra's Mercury XU* Modules.

It also adds possibility to disable ECC checking in the Cortex R Tightly Coupled Memory (TCM)

@zephyrbot

This comment has been minimized.

Copy link
Collaborator

commented Sep 2, 2019

All checks are passing now.

Review history of this comment for details about previous failed status.
Note that some checks might have not completed yet.

@kgugala kgugala force-pushed the antmicro:mercury-suppport branch 2 times, most recently from 3a6674b to ae9b82e Sep 2, 2019

@kgugala kgugala requested a review from wjliang as a code owner Sep 4, 2019

wsipak added 4 commits Aug 29, 2019
arch: arm: cortex_r: disable ECC on TCMs
This commit adds possibility to disable ECC in Tightly Coupled
Memory in Cortex-R.
Linker scripts places stacks in this memory and marks it as
.noinit section. With ECC enabled, stack read accesses without
previous write result in Data Abort Exception.

Signed-off-by: Wojciech Sipak <wsipak@internships.antmicro.com>
dts: arm: fix addresses of zynqmp gic
The addresses are incorrect. According to the ZynqMP's TRM
0xF9010000 is the base address of an interrupt controller for
Cortex-A53 and 0xF9000000 is the address of interrupt controller
for Cortex-R5

Signed-off-by: Wojciech Sipak <wsipak@internships.antmicro.com>
boards: arm: add suport for Enclustra Mercury XU boards
This commit adds support for Enclustra's boards with ZynqMP SoC

Signed-off-by: Wojciech Sipak <wsipak@internships.antmicro.com>
drivers: timer: add dummy functions to xlnx timer
This commit adds dummy functions for tickless kernel api
in xlnx_psttc_timer driver.

Signed-off-by: Wojciech Sipak <wsipak@internships.antmicro.com>

@kgugala kgugala force-pushed the antmicro:mercury-suppport branch from ae9b82e to b8f49fa Sep 9, 2019

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
3 participants
You can’t perform that action at this time.