boards: xtensa: esp32s2_franzininho: add support to the ESP32 S2 Franzininho educational development board.

boards/xtensa/esp32s2_franzininho/Kconfig.board

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+# ESP32S2 Franzininho board configuration
+
+# Copyright (c) 2022 Felipe Neves
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_ESP32S2_FRANZININHO
+	bool "ESP32S2 Franzininho Board"
+	depends on SOC_ESP32S2

boards/xtensa/esp32s2_franzininho/Kconfig.defconfig

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+# ESP32S2 Franzininho board configuration
+
+# Copyright (c) 2022 Felipe Neves
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD
+	default "esp32s2_franzininho"
+	depends on BOARD_ESP32S2_FRANZININHO
+
+config ENTROPY_GENERATOR
+	default y

boards/xtensa/esp32s2_franzininho/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
+  set(OPENOCD OPENOCD-NOTFOUND)
+endif()
+find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
+
+include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/xtensa/esp32s2_franzininho/doc/index.rst

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+.. _esp32s2_franzininho:
+
+ESP32-S2 Franzininho
+####################
+
+Overview
+********
+
+Franzininho is an educational development board based on ESP32-S2 which is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC,
+designed to be secure and cost-effective, with a high performance and a rich set of IO capabilities. [1]_
+
+The features include the following:
+
+- RSA-3072-based secure boot
+- AES-XTS-256-based flash encryption
+- Protected private key and device secrets from software access
+- Cryptographic accelerators for enhanced performance
+- Protection against physical fault injection attacks
+- Various peripherals:
+
+  - 43x programmable GPIOs
+  - 14x configurable capacitive touch GPIOs
+  - USB OTG
+  - LCD interface
+  - camera interface
+  - SPI
+  - I2S
+  - UART
+  - ADC
+  - DAC
+  - LED PWM with up to 8 channels
+
+.. figure:: img/esp32_s2_franzininho.jpg
+        :align: center
+        :alt: ESP32-S2 FRANZININHO
+
+System requirements
+*******************
+
+Prerequisites
+-------------
+
+Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
+below to retrieve those files.
+
+.. code-block:: console
+
+   west blobs fetch hal_espressif
+
+.. note::
+
+   It is recommended running the command above after :file:`west update`.
+
+Building & Flashing
+-------------------
+
+Build and flash applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: esp32s2_franzininho
+   :goals: build
+
+The usual ``flash`` target will work with the ``esp32s2_franzininho`` board
+configuration. Here is an example for the :ref:`hello_world`
+application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: esp32s2_franzininho
+   :goals: flash
+
+Open the serial monitor using the following command:
+
+.. code-block:: shell
+
+   west espressif monitor
+
+After the board has automatically reset and booted, you should see the following
+message in the monitor:
+
+.. code-block:: console
+
+   ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
+   Hello World! esp32s2_franzininho
+
+References
+**********
+
+.. [1] https://www.espressif.com/en/products/socs/esp32-s2
+.. _`ESP32S2 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf
+.. _`ESP32S2 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf

boards/xtensa/esp32s2_franzininho/esp32s2_franzininho-pinctrl.dtsi

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+/*
+ * Copyright (c) 2022 Felipe Neves.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+#include <dt-bindings/pinctrl/esp32s2-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/esp32s2-gpio-sigmap.h>
+
+&pinctrl {
+
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <UART0_TX_GPIO43>;
+		};
+		group2 {
+			pinmux = <UART0_RX_GPIO44>;
+			bias-pull-up;
+		};
+	};
+
+	spim2_default: spim2_default {
+		group1 {
+			pinmux = <SPIM2_MISO_GPIO13>,
+				 <SPIM2_SCLK_GPIO12>,
+				 <SPIM2_CSEL_GPIO10>;
+		};
+		group2 {
+			pinmux = <SPIM2_MOSI_GPIO11>;
+			output-low;
+		};
+	};
+
+	spim3_default: spim3_default {
+		group1 {
+			pinmux = <SPIM3_MISO_GPIO37>,
+				 <SPIM3_SCLK_GPIO36>,
+				 <SPIM3_CSEL_GPIO34>;
+		};
+		group2 {
+			pinmux = <SPIM3_MOSI_GPIO35>;
+			output-low;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <I2C0_SDA_GPIO8>,
+				 <I2C0_SCL_GPIO9>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			pinmux = <I2C1_SDA_GPIO3>,
+				 <I2C1_SCL_GPIO4>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+};

boards/xtensa/esp32s2_franzininho/esp32s2_franzininho.dts

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+/*
+ * Copyright (c) 2022 Felipe Neves.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <espressif/esp32s2.dtsi>
+#include "esp32s2_franzininho-pinctrl.dtsi"
+
+/ {
+	model = "esp32s2_franzininho";
+	compatible = "espressif,esp32s2";
+
+	aliases {
+		led0 = &user_led_0;
+		led1 = &user_led_1;
+		i2c-0 = &i2c0;
+		watchdog0 = &wdt0;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		user_led_0: led_0 {
+			gpios =  <&gpio0 21 GPIO_ACTIVE_HIGH>;
+			label = "User - LED0";
+		};
+
+		user_led_1: led_1 {
+			gpios =  <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			label = "User - LED1";
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&timer0 {
+	status = "okay";
+};
+
+&timer1 {
+	status = "okay";
+};
+
+&timer2 {
+	status = "okay";
+};
+
+&timer3 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+};
+
+&i2c1 {
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c1_default>;
+	pinctrl-names = "default";
+};
+
+&trng0 {
+	status = "okay";
+};
+
+&spi2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	pinctrl-0 = <&spim2_default>;
+	pinctrl-names = "default";
+};
+
+&spi3 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	pinctrl-0 = <&spim3_default>;
+	pinctrl-names = "default";
+};
+
+&flash0 {
+	status = "okay";
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Reserve 60kB for the bootloader */
+		boot_partition: partition@1000 {
+			label = "mcuboot";
+			reg = <0x00001000 0x0000F000>;
+			read-only;
+		};
+
+		/* Reserve 1024kB for the application in slot 0 */
+		slot0_partition: partition@10000 {
+			label = "image-0";
+			reg = <0x00010000 0x00100000>;
+		};
+
+		/* Reserve 1024kB for the application in slot 1 */
+		slot1_partition: partition@110000 {
+			label = "image-1";
+			reg = <0x00110000 0x00100000>;
+		};
+
+		/* Reserve 256kB for the scratch partition */
+		scratch_partition: partition@210000 {
+			   label = "image-scratch";
+			   reg = <0x00210000 0x00040000>;
+		};
+
+		storage_partition: partition@250000 {
+			label = "storage";
+			reg = <0x00250000 0x00006000>;
+		};
+	};
+};
+
+&wdt0 {
+	status = "okay";
+};

boards/xtensa/esp32s2_franzininho/esp32s2_franzininho.yaml

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+identifier: esp32s2_franzininho
+name: ESP32-S2
+type: mcu
+arch: xtensa
+toolchain:
+  - zephyr
+supported:
+  - gpio
+  - i2c
+  - watchdog
+  - uart
+  - pinmux
+  - nvs
+testing:
+  ignore_tags:
+    - heap
+    - net
+    - bluetooth

boards/xtensa/esp32s2_franzininho/esp32s2_franzininho_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_XTENSA_RESET_VECTOR=n
+
+CONFIG_BOARD_ESP32S2_FRANZININHO=y
+CONFIG_SOC_ESP32S2=y
+CONFIG_MAIN_STACK_SIZE=2048
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=240000000
+
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_XTENSA_USE_CORE_CRT1=n
+
+CONFIG_GPIO=y
+
+CONFIG_GEN_ISR_TABLES=y
+CONFIG_GEN_IRQ_VECTOR_TABLE=n
+
+CONFIG_CLOCK_CONTROL=y
+
+CONFIG_BOOTLOADER_ESP_IDF=y

boards/xtensa/esp32s2_franzininho/support/openocd.cfg

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+set ESP_RTOS none
+
+source [find interface/ftdi/esp32s2_kaluga_v1.cfg]
+source [find target/esp32s2.cfg]