From a026a695cc9cb4c00cfa7cb739e731e4dd15b2f9 Mon Sep 17 00:00:00 2001 From: Holt Sun Date: Tue, 28 Oct 2025 16:53:11 +0800 Subject: [PATCH 1/3] modules: hal_nxp: mcux: add HAS_MCUX_LMEM_CACHE and hook LMEM for MCXE24X Select cache_lmem component for MCXE24X devices. This exposes the LMEM cache API needed by the Zephyr driver Signed-off-by: Holt Sun --- modules/hal_nxp/mcux/Kconfig.mcux | 7 ++++++- modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/modules/hal_nxp/mcux/Kconfig.mcux b/modules/hal_nxp/mcux/Kconfig.mcux index 7d53f570a897e..c79e2dcb47553 100644 --- a/modules/hal_nxp/mcux/Kconfig.mcux +++ b/modules/hal_nxp/mcux/Kconfig.mcux @@ -1,7 +1,7 @@ # MCUXpresso SDK # Copyright (c) 2016, Freescale Semiconductor, Inc. -# Copyright 2024 NXP +# Copyright 2024, 2025 NXP # SPDX-License-Identifier: Apache-2.0 config HAS_MCUX @@ -52,6 +52,11 @@ config HAS_MCUX_XCACHE help Set if the XCACHE module is present on the SoC. +config HAS_MCUX_LMEM_CACHE + bool + help + Set if the LMEM Cache module is present on the SoC. + config HAS_NXP_MONOLITHIC_NBU bool help diff --git a/modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake b/modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake index 27fcd925cf4ff..08f251566c630 100644 --- a/modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake +++ b/modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake @@ -200,6 +200,8 @@ elseif((${MCUX_DEVICE} MATCHES "MIMXRT(5|6)") OR (${MCUX_DEVICE} MATCHES "RW61") set_variable_ifdef(CONFIG_HAS_MCUX_CACHE CONFIG_MCUX_COMPONENT_driver.cache_cache64) elseif((${MCUX_DEVICE} MATCHES "MK(28|66)") OR (${MCUX_DEVICE} MATCHES "MKE(14|16|18)") OR (CONFIG_SOC_MIMXRT1166_CM4) OR (CONFIG_SOC_MIMXRT1176_CM4)) set_variable_ifdef(CONFIG_HAS_MCUX_CACHE CONFIG_MCUX_COMPONENT_driver.cache_lmem) +elseif(CONFIG_SOC_SERIES_MCXE24X) + set_variable_ifdef(CONFIG_HAS_MCUX_LMEM_CACHE CONFIG_MCUX_COMPONENT_driver.cache_lmem) elseif(CONFIG_CPU_CORTEX_A) set_variable_ifdef(CONFIG_HAS_MCUX_CACHE CONFIG_MCUX_COMPONENT_driver.cache_armv8_a) endif() From 2ad23832b3c29223b0232372a2c87ba7db39c8de Mon Sep 17 00:00:00 2001 From: Holt Sun Date: Tue, 28 Oct 2025 16:56:46 +0800 Subject: [PATCH 2/3] drivers: cache: add NXP LMEM cache driver Add LMEM cache driver implementing instruction cache ops. Wire driver into cache Kconfig menu and CMake build. Enables I-cache control on SoCs with NXP LMEM controller. Signed-off-by: Holt Sun --- drivers/cache/CMakeLists.txt | 1 + drivers/cache/Kconfig | 1 + drivers/cache/Kconfig.nxp_lmem_cache | 10 +++++ drivers/cache/cache_nxp_lmem_cache.c | 62 ++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+) create mode 100644 drivers/cache/Kconfig.nxp_lmem_cache create mode 100644 drivers/cache/cache_nxp_lmem_cache.c diff --git a/drivers/cache/CMakeLists.txt b/drivers/cache/CMakeLists.txt index 3f5b7a3eb9b28..66e446212ed44 100644 --- a/drivers/cache/CMakeLists.txt +++ b/drivers/cache/CMakeLists.txt @@ -12,6 +12,7 @@ zephyr_library_sources_ifdef(CONFIG_CACHE_ANDES cache_andes.c) zephyr_library_sources_ifdef(CONFIG_CACHE_ASPEED cache_aspeed.c) zephyr_library_sources_ifdef(CONFIG_CACHE_BFLB_L1C cache_bflb_l1c.c) zephyr_library_sources_ifdef(CONFIG_CACHE_NRF_CACHE cache_nrf.c) +zephyr_library_sources_ifdef(CONFIG_CACHE_NXP_LMEM_CACHE cache_nxp_lmem_cache.c) zephyr_library_sources_ifdef(CONFIG_CACHE_NXP_XCACHE cache_nxp_xcache.c) zephyr_library_sources_ifdef(CONFIG_CACHE_STM32 cache_stm32.c) # zephyr-keep-sorted-stop diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index 6b0cb9725fedb..113f0b01afee8 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -23,6 +23,7 @@ source "drivers/cache/Kconfig.andes" source "drivers/cache/Kconfig.aspeed" source "drivers/cache/Kconfig.bflb" source "drivers/cache/Kconfig.nrf" +source "drivers/cache/Kconfig.nxp_lmem_cache" source "drivers/cache/Kconfig.nxp_xcache" source "drivers/cache/Kconfig.stm32" # zephyr-keep-sorted-stop diff --git a/drivers/cache/Kconfig.nxp_lmem_cache b/drivers/cache/Kconfig.nxp_lmem_cache new file mode 100644 index 0000000000000..6bb6c28d345c8 --- /dev/null +++ b/drivers/cache/Kconfig.nxp_lmem_cache @@ -0,0 +1,10 @@ +# Copyright 2025 NXP +# SPDX-License-Identifier: Apache-2.0 + +config CACHE_NXP_LMEM_CACHE + bool "NXP LMEM cache driver" + default y + select CACHE_HAS_DRIVER + depends on HAS_MCUX_LMEM_CACHE + help + This option enables the LMEM cache driver for NXP SOCs. diff --git a/drivers/cache/cache_nxp_lmem_cache.c b/drivers/cache/cache_nxp_lmem_cache.c new file mode 100644 index 0000000000000..4c7d8370956f7 --- /dev/null +++ b/drivers/cache/cache_nxp_lmem_cache.c @@ -0,0 +1,62 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +void cache_instr_enable(void) +{ + L1CACHE_EnableCodeCache(); +} + +void cache_instr_disable(void) +{ + L1CACHE_DisableCodeCache(); +} + +int cache_instr_flush_all(void) +{ + L1CACHE_CleanCodeCache(); + + return 0; +} + +int cache_instr_invd_all(void) +{ + L1CACHE_InvalidateCodeCache(); + + return 0; +} + +int cache_instr_flush_and_invd_all(void) +{ + L1CACHE_CleanInvalidateCodeCache(); + + return 0; +} + +int cache_instr_flush_range(void *addr, size_t size) +{ + L1CACHE_CleanCodeCacheByRange((uint32_t)addr, (uint32_t)size); + + return 0; +} + +int cache_instr_invd_range(void *addr, size_t size) +{ + L1CACHE_InvalidateCodeCacheByRange((uint32_t)addr, (uint32_t)size); + + return 0; +} + +int cache_instr_flush_and_invd_range(void *addr, size_t size) +{ + L1CACHE_CleanInvalidateCodeCacheByRange((uint32_t)addr, (uint32_t)size); + + return 0; +} From a8b7c54ea3372bf590e355a6c105979940ac0c5c Mon Sep 17 00:00:00 2001 From: Holt Sun Date: Tue, 28 Oct 2025 16:59:13 +0800 Subject: [PATCH 3/3] soc: nxp: mcx: mcxe24x: enable LMEM I-cache and cache management Select CPU_HAS_ICACHE and HAS_MCUX_LMEM_CACHE. Default CACHE_MANAGEMENT=y and select EXTERNAL_CACHE. Prepares MCXE24x to use the LMEM cache driver. Signed-off-by: Holt Sun --- soc/nxp/mcx/mcxe/mcxe24x/Kconfig | 2 ++ soc/nxp/mcx/mcxe/mcxe24x/Kconfig.defconfig | 8 ++++++++ 2 files changed, 10 insertions(+) diff --git a/soc/nxp/mcx/mcxe/mcxe24x/Kconfig b/soc/nxp/mcx/mcxe/mcxe24x/Kconfig index f40f2ff28a4bb..94e69e68b8070 100644 --- a/soc/nxp/mcx/mcxe/mcxe24x/Kconfig +++ b/soc/nxp/mcx/mcxe/mcxe24x/Kconfig @@ -9,6 +9,8 @@ config SOC_SERIES_MCXE24X select HAS_MCUX select CLOCK_CONTROL select SOC_RESET_HOOK + select CPU_HAS_ICACHE + select HAS_MCUX_LMEM_CACHE if SOC_SERIES_MCXE24X diff --git a/soc/nxp/mcx/mcxe/mcxe24x/Kconfig.defconfig b/soc/nxp/mcx/mcxe/mcxe24x/Kconfig.defconfig index a044901f3e401..3b9f2635e8958 100644 --- a/soc/nxp/mcx/mcxe/mcxe24x/Kconfig.defconfig +++ b/soc/nxp/mcx/mcxe/mcxe24x/Kconfig.defconfig @@ -19,4 +19,12 @@ config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS config GPIO default y +# Enable cache management features +configdefault CACHE_MANAGEMENT + default y + +choice CACHE_TYPE + default EXTERNAL_CACHE +endchoice + endif # SOC_SERIES_MCXE24X