diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi
index ddc9b728caf13..f5471241ba6df 100644
--- a/dts/arm/st/l4/stm32l4.dtsi
+++ b/dts/arm/st/l4/stm32l4.dtsi
@@ -2,7 +2,6 @@
  * Copyright (c) 2017 Linaro Limited
  * Copyright (c) 2019 Centaur Analytics, Inc
  * Copyright (c) 2024 STMicroelectronics
- * Copyright (c) 2025 Mario Paja
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -591,30 +590,6 @@
 		i2c = <&i2c3>;
 		status = "disabled";
 	};
-
-	sai1_a: sai1@40015404 {
-		compatible = "st,stm32-sai";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x40015404 0x20>;
-		clocks = <&rcc STM32_CLOCK(APB2, 21)>,
-			 <&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
-		dmas = <&dma2 1 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
-			STM32_DMA_16BITS)>;
-		status = "disabled";
-	};
-
-	sai1_b: sai1@40015424 {
-		compatible = "st,stm32-sai";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x40015424 0x20>;
-		clocks = <&rcc STM32_CLOCK(APB2, 21)>,
-			 <&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
-		dmas = <&dma2 2 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
-			STM32_DMA_16BITS)>;
-		status = "disabled";
-	};
 };
 
 &nvic {
diff --git a/dts/arm/st/l4/stm32l431.dtsi b/dts/arm/st/l4/stm32l431.dtsi
index 111d982a8b401..5b0ac053a4a2b 100644
--- a/dts/arm/st/l4/stm32l431.dtsi
+++ b/dts/arm/st/l4/stm32l431.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <st/l4/stm32l4.dtsi>
+#include <st/l4/stm32l4_sai.dtsi>
 
 / {
 	clocks {
diff --git a/dts/arm/st/l4/stm32l432.dtsi b/dts/arm/st/l4/stm32l432.dtsi
index 48fc01b264aaf..81ccbdd4c62e0 100644
--- a/dts/arm/st/l4/stm32l432.dtsi
+++ b/dts/arm/st/l4/stm32l432.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <st/l4/stm32l4.dtsi>
+#include <st/l4/stm32l4_sai.dtsi>
 
 / {
 	clocks {
diff --git a/dts/arm/st/l4/stm32l451.dtsi b/dts/arm/st/l4/stm32l451.dtsi
index 1ba5f5922e62f..21622813cd031 100644
--- a/dts/arm/st/l4/stm32l451.dtsi
+++ b/dts/arm/st/l4/stm32l451.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <st/l4/stm32l4.dtsi>
+#include <st/l4/stm32l4_sai.dtsi>
 #include <zephyr/dt-bindings/sensor/qdec_stm32.h>
 
 / {
diff --git a/dts/arm/st/l4/stm32l471.dtsi b/dts/arm/st/l4/stm32l471.dtsi
index 3c8ab8bf32798..b4cff29d438ce 100644
--- a/dts/arm/st/l4/stm32l471.dtsi
+++ b/dts/arm/st/l4/stm32l471.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <st/l4/stm32l4.dtsi>
+#include <st/l4/stm32l4_sai.dtsi>
 #include <zephyr/dt-bindings/sensor/qdec_stm32.h>
 
 / {
diff --git a/dts/arm/st/l4/stm32l4_sai.dtsi b/dts/arm/st/l4/stm32l4_sai.dtsi
new file mode 100644
index 0000000000000..8154bc73bc34b
--- /dev/null
+++ b/dts/arm/st/l4/stm32l4_sai.dtsi
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2025 Mario Paja
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		sai1_a: sai1@40015404 {
+			compatible = "st,stm32-sai";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40015404 0x20>;
+			clocks = <&rcc STM32_CLOCK(APB2, 21)>,
+				 <&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
+			dmas = <&dma2 1 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
+				STM32_DMA_16BITS)>;
+			status = "disabled";
+		};
+
+		sai1_b: sai1@40015424 {
+			compatible = "st,stm32-sai";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40015424 0x20>;
+			clocks = <&rcc STM32_CLOCK(APB2, 21)>,
+				 <&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
+			dmas = <&dma2 2 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
+				STM32_DMA_16BITS)>;
+			status = "disabled";
+		};
+	};
+};
diff --git a/dts/arm/st/l4/stm32l4p5.dtsi b/dts/arm/st/l4/stm32l4p5.dtsi
index dae55b11d62ce..2ee027d064b4f 100644
--- a/dts/arm/st/l4/stm32l4p5.dtsi
+++ b/dts/arm/st/l4/stm32l4p5.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <st/l4/stm32l4.dtsi>
+#include <st/l4/stm32l4_sai.dtsi>
 #include <zephyr/dt-bindings/clock/stm32l4plus_clock.h>
 #include <zephyr/dt-bindings/flash_controller/ospi.h>
 #include <zephyr/dt-bindings/sensor/qdec_stm32.h>