{"payload":{"header_redesign_enabled":false,"results":[{"id":"708815245","archived":false,"color":"#3572A5","followers":0,"has_funding_file":false,"hl_name":"zignig/patina","hl_trunc_description":"minimal riscv rust runtime for a FPGA core","language":"Python","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":708815245,"name":"patina","owner_id":109033,"owner_login":"zignig","updated_at":"2024-05-15T04:51:33.597Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":59,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Azignig%252Fpatina%2B%2Blanguage%253APython","metadata":null,"csrf_tokens":{"/zignig/patina/star":{"post":"EErkSgRtpdc7ektU74SVCDWOMGQvu6h3OFkVgCfDhrDJdnBaOKlJcQe2lacbszWXKz9gS7iUglfDvPrpTNzArQ"},"/zignig/patina/unstar":{"post":"HALXdEryp_uvEnptLneaO6I4mHbvA7q1BBOx7g1_G5SSrGcNo0HwOBdyGUHgRDaNwGXICvwr1MeD84GQam3SsQ"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"azwRYDXJAqN-tC-PoOvXvmWm9hhugV0XM9W7zKR9pwEoRW86LeYU_9RlGAS5puwBf8_Gj69F_PUvPhm1Hr4umw"}}},"title":"Repository search results"}