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  1. SONY-Cell-SPU-Processor SONY-Cell-SPU-Processor Public

    This repository contains the complete Verilog implementation and supporting tools for a cycle-accurate, dual-issue pipelined multimedia processor inspired by the Synergistic Processing Unit (SPU) o…

    Verilog 15

  2. FPGA-Note-Tuner FPGA-Note-Tuner Public

    This project involves designing a guitar tuner using an Artix-7 FPGA from Xilinx. The tuner processes 24-bit, 48 kHz stereo audio input, performs Fast Fourier Transform (FFT) to analyze frequencies…

    VHDL

  3. SIMD_Multimedia_Processing_Unit SIMD_Multimedia_Processing_Unit Public

    This project involves the design and implementation of a 4-stage pipelined multimedia processing unit using VHDL/Verilog hardware description languages.

    VHDL 1 1

  4. FPGA-i2s-demo FPGA-i2s-demo Public

    sub-project from Note_tuner project

    VHDL

  5. Posit-cpp Posit-cpp Public

    C++ library is specifically designed to facilitate the implementation and evaluation of the posit number system, a new alternative to floating-point arithmetic that offers improved accuracy, perfor…

    C++

  6. Fiduccia-Mattheyses-partitioning Fiduccia-Mattheyses-partitioning Public

    To implement and experiment the Fiduccia-Mattheyses partitioning algorithm for gate-level designs.

    Raku