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alexforencichalexforencich
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Convert FIFOs to use DEPTH parameter instead of ADDR_WIDTH
1 parent e0a1a73 commit 69de6fd

34 files changed

+64
-60
lines changed

‎rtl/axis_async_fifo.v

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ THE SOFTWARE.
3131
*/
3232
module axis_async_fifo #
3333
(
34-
parameter ADDR_WIDTH = 12,
34+
parameter DEPTH = 4096,
3535
parameter DATA_WIDTH = 8,
3636
parameter KEEP_ENABLE = (DATA_WIDTH>8),
3737
parameter KEEP_WIDTH = (DATA_WIDTH/8),
@@ -91,6 +91,8 @@ module axis_async_fifo #
9191
output wire m_status_good_frame
9292
);
9393

94+
parameter ADDR_WIDTH = (KEEP_ENABLE && KEEP_WIDTH > 1) ? $clog2(DEPTH/KEEP_WIDTH) : $clog2(DEPTH);
95+
9496
// check configuration
9597
initial begin
9698
if (FRAME_FIFO && !LAST_ENABLE) begin

‎rtl/axis_async_fifo_adapter.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ THE SOFTWARE.
3131
*/
3232
module axis_async_fifo_adapter #
3333
(
34-
parameter ADDR_WIDTH = 12,
34+
parameter DEPTH = 4096,
3535
parameter S_DATA_WIDTH = 8,
3636
parameter S_KEEP_ENABLE = (S_DATA_WIDTH>8),
3737
parameter S_KEEP_WIDTH = (S_DATA_WIDTH/8),
@@ -269,7 +269,7 @@ end
269269
endgenerate
270270

271271
axis_async_fifo #(
272-
.ADDR_WIDTH(ADDR_WIDTH),
272+
.DEPTH(DEPTH),
273273
.DATA_WIDTH(DATA_WIDTH),
274274
.KEEP_ENABLE(EXPAND_BUS ? M_KEEP_ENABLE : S_KEEP_ENABLE),
275275
.KEEP_WIDTH(KEEP_WIDTH),

‎rtl/axis_cobs_encode.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ wire code_fifo_out_tuser;
101101
reg code_fifo_out_tready;
102102

103103
axis_fifo #(
104-
.ADDR_WIDTH(8),
104+
.DEPTH(256),
105105
.DATA_WIDTH(8),
106106
.KEEP_ENABLE(0),
107107
.LAST_ENABLE(1),
@@ -149,7 +149,7 @@ wire data_fifo_out_tlast;
149149
reg data_fifo_out_tready;
150150

151151
axis_fifo #(
152-
.ADDR_WIDTH(8),
152+
.DEPTH(256),
153153
.DATA_WIDTH(8),
154154
.KEEP_ENABLE(0),
155155
.LAST_ENABLE(1),

‎rtl/axis_fifo.v

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ THE SOFTWARE.
3131
*/
3232
module axis_fifo #
3333
(
34-
parameter ADDR_WIDTH = 12,
34+
parameter DEPTH = 4096,
3535
parameter DATA_WIDTH = 8,
3636
parameter KEEP_ENABLE = (DATA_WIDTH>8),
3737
parameter KEEP_WIDTH = (DATA_WIDTH/8),
@@ -84,6 +84,8 @@ module axis_fifo #
8484
output wire status_good_frame
8585
);
8686

87+
parameter ADDR_WIDTH = (KEEP_ENABLE && KEEP_WIDTH > 1) ? $clog2(DEPTH/KEEP_WIDTH) : $clog2(DEPTH);
88+
8789
// check configuration
8890
initial begin
8991
if (FRAME_FIFO && !LAST_ENABLE) begin

‎rtl/axis_fifo_adapter.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ THE SOFTWARE.
3131
*/
3232
module axis_fifo_adapter #
3333
(
34-
parameter ADDR_WIDTH = 12,
34+
parameter DEPTH = 4096,
3535
parameter S_DATA_WIDTH = 8,
3636
parameter S_KEEP_ENABLE = (S_DATA_WIDTH>8),
3737
parameter S_KEEP_WIDTH = (S_DATA_WIDTH/8),
@@ -264,7 +264,7 @@ end
264264
endgenerate
265265

266266
axis_fifo #(
267-
.ADDR_WIDTH(ADDR_WIDTH),
267+
.DEPTH(DEPTH),
268268
.DATA_WIDTH(DATA_WIDTH),
269269
.KEEP_ENABLE(EXPAND_BUS ? M_KEEP_ENABLE : S_KEEP_ENABLE),
270270
.KEEP_WIDTH(KEEP_WIDTH),

‎rtl/axis_frame_length_adjust_fifo.v

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,8 +40,8 @@ module axis_frame_length_adjust_fifo #
4040
parameter DEST_WIDTH = 8,
4141
parameter USER_ENABLE = 1,
4242
parameter USER_WIDTH = 1,
43-
parameter FRAME_FIFO_ADDR_WIDTH = 12,
44-
parameter HEADER_FIFO_ADDR_WIDTH = 3
43+
parameter FRAME_FIFO_DEPTH = 4096,
44+
parameter HEADER_FIFO_DEPTH = 8
4545
)
4646
(
4747
input wire clk,
@@ -145,7 +145,7 @@ axis_frame_length_adjust_inst (
145145
);
146146

147147
axis_fifo #(
148-
.ADDR_WIDTH(FRAME_FIFO_ADDR_WIDTH),
148+
.DEPTH(FRAME_FIFO_DEPTH),
149149
.DATA_WIDTH(DATA_WIDTH),
150150
.KEEP_ENABLE(KEEP_ENABLE),
151151
.KEEP_WIDTH(KEEP_WIDTH),
@@ -186,7 +186,7 @@ frame_fifo_inst (
186186
);
187187

188188
axis_fifo #(
189-
.ADDR_WIDTH(HEADER_FIFO_ADDR_WIDTH),
189+
.DEPTH(HEADER_FIFO_DEPTH),
190190
.DATA_WIDTH(1+1+16+16),
191191
.KEEP_ENABLE(0),
192192
.LAST_ENABLE(0),

‎tb/test_axis_async_fifo.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 2
46+
DEPTH = 4
4747
DATA_WIDTH = 8
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

‎tb/test_axis_async_fifo.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_async_fifo;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 4;
3636
parameter DATA_WIDTH = 8;
3737
parameter KEEP_ENABLE = (DATA_WIDTH>8);
3838
parameter KEEP_WIDTH = (DATA_WIDTH/8);
@@ -107,7 +107,7 @@ initial begin
107107
end
108108

109109
axis_async_fifo #(
110-
.ADDR_WIDTH(ADDR_WIDTH),
110+
.DEPTH(DEPTH),
111111
.DATA_WIDTH(DATA_WIDTH),
112112
.KEEP_ENABLE(KEEP_ENABLE),
113113
.KEEP_WIDTH(KEEP_WIDTH),

‎tb/test_axis_async_fifo_64.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 2
46+
DEPTH = 32
4747
DATA_WIDTH = 64
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

‎tb/test_axis_async_fifo_64.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_async_fifo_64;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 32;
3636
parameter DATA_WIDTH = 64;
3737
parameter KEEP_ENABLE = (DATA_WIDTH>8);
3838
parameter KEEP_WIDTH = (DATA_WIDTH/8);
@@ -107,7 +107,7 @@ initial begin
107107
end
108108

109109
axis_async_fifo #(
110-
.ADDR_WIDTH(ADDR_WIDTH),
110+
.DEPTH(DEPTH),
111111
.DATA_WIDTH(DATA_WIDTH),
112112
.KEEP_ENABLE(KEEP_ENABLE),
113113
.KEEP_WIDTH(KEEP_WIDTH),

‎tb/test_axis_async_fifo_adapter_64_8.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@
4545
def bench():
4646

4747
# Parameters
48-
ADDR_WIDTH = 2
48+
DEPTH = 32
4949
S_DATA_WIDTH = 64
5050
S_KEEP_ENABLE = (S_DATA_WIDTH>8)
5151
S_KEEP_WIDTH = (S_DATA_WIDTH/8)

‎tb/test_axis_async_fifo_adapter_64_8.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_async_fifo_adapter_64_8;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 32;
3636
parameter S_DATA_WIDTH = 64;
3737
parameter S_KEEP_ENABLE = (S_DATA_WIDTH>8);
3838
parameter S_KEEP_WIDTH = (S_DATA_WIDTH/8);
@@ -111,7 +111,7 @@ initial begin
111111
end
112112

113113
axis_async_fifo_adapter #(
114-
.ADDR_WIDTH(ADDR_WIDTH),
114+
.DEPTH(DEPTH),
115115
.S_DATA_WIDTH(S_DATA_WIDTH),
116116
.S_KEEP_ENABLE(S_KEEP_ENABLE),
117117
.S_KEEP_WIDTH(S_KEEP_WIDTH),

‎tb/test_axis_async_fifo_adapter_8_64.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@
4545
def bench():
4646

4747
# Parameters
48-
ADDR_WIDTH = 2
48+
DEPTH = 32
4949
S_DATA_WIDTH = 8
5050
S_KEEP_ENABLE = (S_DATA_WIDTH>8)
5151
S_KEEP_WIDTH = (S_DATA_WIDTH/8)

‎tb/test_axis_async_fifo_adapter_8_64.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_async_fifo_adapter_8_64;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 32;
3636
parameter S_DATA_WIDTH = 8;
3737
parameter S_KEEP_ENABLE = (S_DATA_WIDTH>8);
3838
parameter S_KEEP_WIDTH = (S_DATA_WIDTH/8);
@@ -111,7 +111,7 @@ initial begin
111111
end
112112

113113
axis_async_fifo_adapter #(
114-
.ADDR_WIDTH(ADDR_WIDTH),
114+
.DEPTH(DEPTH),
115115
.S_DATA_WIDTH(S_DATA_WIDTH),
116116
.S_KEEP_ENABLE(S_KEEP_ENABLE),
117117
.S_KEEP_WIDTH(S_KEEP_WIDTH),

‎tb/test_axis_async_frame_fifo.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 9
46+
DEPTH = 512
4747
DATA_WIDTH = 8
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

‎tb/test_axis_async_frame_fifo.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_async_frame_fifo;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 9;
35+
parameter DEPTH = 512;
3636
parameter DATA_WIDTH = 8;
3737
parameter KEEP_ENABLE = (DATA_WIDTH>8);
3838
parameter KEEP_WIDTH = (DATA_WIDTH/8);
@@ -119,7 +119,7 @@ initial begin
119119
end
120120

121121
axis_async_fifo #(
122-
.ADDR_WIDTH(ADDR_WIDTH),
122+
.DEPTH(DEPTH),
123123
.DATA_WIDTH(DATA_WIDTH),
124124
.KEEP_ENABLE(KEEP_ENABLE),
125125
.KEEP_WIDTH(KEEP_WIDTH),

‎tb/test_axis_async_frame_fifo_64.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 6
46+
DEPTH = 512
4747
DATA_WIDTH = 64
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

‎tb/test_axis_async_frame_fifo_64.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_async_frame_fifo_64;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 6;
35+
parameter DEPTH = 512;
3636
parameter DATA_WIDTH = 64;
3737
parameter KEEP_ENABLE = (DATA_WIDTH>8);
3838
parameter KEEP_WIDTH = (DATA_WIDTH/8);
@@ -119,7 +119,7 @@ initial begin
119119
end
120120

121121
axis_async_fifo #(
122-
.ADDR_WIDTH(ADDR_WIDTH),
122+
.DEPTH(DEPTH),
123123
.DATA_WIDTH(DATA_WIDTH),
124124
.KEEP_ENABLE(KEEP_ENABLE),
125125
.KEEP_WIDTH(KEEP_WIDTH),

‎tb/test_axis_fifo.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 2
46+
DEPTH = 4
4747
DATA_WIDTH = 8
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

‎tb/test_axis_fifo.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_fifo;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 4;
3636
parameter DATA_WIDTH = 8;
3737
parameter KEEP_ENABLE = (DATA_WIDTH>8);
3838
parameter KEEP_WIDTH = (DATA_WIDTH/8);
@@ -105,7 +105,7 @@ initial begin
105105
end
106106

107107
axis_fifo #(
108-
.ADDR_WIDTH(ADDR_WIDTH),
108+
.DEPTH(DEPTH),
109109
.DATA_WIDTH(DATA_WIDTH),
110110
.KEEP_ENABLE(KEEP_ENABLE),
111111
.KEEP_WIDTH(KEEP_WIDTH),

‎tb/test_axis_fifo_64.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 2
46+
DEPTH = 32
4747
DATA_WIDTH = 64
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

‎tb/test_axis_fifo_64.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_fifo_64;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 32;
3636
parameter DATA_WIDTH = 64;
3737
parameter KEEP_ENABLE = (DATA_WIDTH>8);
3838
parameter KEEP_WIDTH = (DATA_WIDTH/8);
@@ -105,7 +105,7 @@ initial begin
105105
end
106106

107107
axis_fifo #(
108-
.ADDR_WIDTH(ADDR_WIDTH),
108+
.DEPTH(DEPTH),
109109
.DATA_WIDTH(DATA_WIDTH),
110110
.KEEP_ENABLE(KEEP_ENABLE),
111111
.KEEP_WIDTH(KEEP_WIDTH),

‎tb/test_axis_fifo_adapter_64_8.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@
4545
def bench():
4646

4747
# Parameters
48-
ADDR_WIDTH = 2
48+
DEPTH = 32
4949
S_DATA_WIDTH = 64
5050
S_KEEP_ENABLE = (S_DATA_WIDTH>8)
5151
S_KEEP_WIDTH = (S_DATA_WIDTH/8)

‎tb/test_axis_fifo_adapter_64_8.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_fifo_adapter_64_8;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 32;
3636
parameter S_DATA_WIDTH = 64;
3737
parameter S_KEEP_ENABLE = (S_DATA_WIDTH>8);
3838
parameter S_KEEP_WIDTH = (S_DATA_WIDTH/8);
@@ -107,7 +107,7 @@ initial begin
107107
end
108108

109109
axis_fifo_adapter #(
110-
.ADDR_WIDTH(ADDR_WIDTH),
110+
.DEPTH(DEPTH),
111111
.S_DATA_WIDTH(S_DATA_WIDTH),
112112
.S_KEEP_ENABLE(S_KEEP_ENABLE),
113113
.S_KEEP_WIDTH(S_KEEP_WIDTH),

‎tb/test_axis_fifo_adapter_8_64.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@
4545
def bench():
4646

4747
# Parameters
48-
ADDR_WIDTH = 2
48+
DEPTH = 32
4949
S_DATA_WIDTH = 8
5050
S_KEEP_ENABLE = (S_DATA_WIDTH>8)
5151
S_KEEP_WIDTH = (S_DATA_WIDTH/8)

‎tb/test_axis_fifo_adapter_8_64.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ THE SOFTWARE.
3232
module test_axis_fifo_adapter_8_64;
3333

3434
// Parameters
35-
parameter ADDR_WIDTH = 2;
35+
parameter DEPTH = 32;
3636
parameter S_DATA_WIDTH = 8;
3737
parameter S_KEEP_ENABLE = (S_DATA_WIDTH>8);
3838
parameter S_KEEP_WIDTH = (S_DATA_WIDTH/8);
@@ -107,7 +107,7 @@ initial begin
107107
end
108108

109109
axis_fifo_adapter #(
110-
.ADDR_WIDTH(ADDR_WIDTH),
110+
.DEPTH(DEPTH),
111111
.S_DATA_WIDTH(S_DATA_WIDTH),
112112
.S_KEEP_ENABLE(S_KEEP_ENABLE),
113113
.S_KEEP_WIDTH(S_KEEP_WIDTH),

‎tb/test_axis_frame_fifo.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
def bench():
4444

4545
# Parameters
46-
ADDR_WIDTH = 9
46+
DEPTH = 512
4747
DATA_WIDTH = 8
4848
KEEP_ENABLE = (DATA_WIDTH>8)
4949
KEEP_WIDTH = (DATA_WIDTH/8)

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