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SystemVerilog to Verilog conversion

Haskell 607 58 Updated Mar 20, 2025

🚀 WebRTC - P2P - Simple, Secure, Fast Real-Time Video Conferences Up to 8k and 60fps, compatible with all browsers and platforms.

JavaScript 3,392 610 Updated Mar 26, 2025

Open-source and open-hardware scientific RPN calculator

C 288 18 Updated Mar 28, 2025

SForth is a public domain Forth compiler for the 68HC11 micro-controller, designed to be compiled on your PC, then downloaded to a serial EEPROM connected to the HC11. In the HC11's 512 bytes EEPRO…

Assembly 5 Updated May 30, 2021

Workshop that is going to be given together with the UPduino dev board

Verilog 21 10 Updated Oct 29, 2021

A custom calculator using the NXP 9S12XEP100 microcontroller

Assembly 3 Updated Aug 8, 2019

Mecrisp-Ice Forth running on 16bit j1a processor (iCE40UP5k based UPduino board) with full 15kB of bram and 48bit Floating Point Library.

Verilog 18 3 Updated Mar 15, 2018

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

Python 1,045 228 Updated Feb 7, 2025

vga adaptation for the 9s12c32 microcontroller

C 6 4 Updated May 1, 2012

GCC update to better support the s12x core

C 4 3 Updated Jan 21, 2018
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