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CAS-Atlantic/vtr-verilog-to-routing

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Verilog to Routing -- Open Source CAD Flow for FPGA Research

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  • C++ 56.2%
  • Verilog 34.6%
  • Python 4.0%
  • C 1.7%
  • Shell 0.8%
  • Yacc 0.6%
  • Other 2.1%