-
Notifications
You must be signed in to change notification settings - Fork 7.4k
Initial Support for ElemRV-N #89441
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Initial Support for ElemRV-N #89441
Conversation
172fb17
to
999e99d
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
the last commit should probably update doc/releases/release-notes-4.2.rst
as well
e553306
to
a62e2ac
Compare
dts/bindings/vendor-prefixes.txt
Outdated
@@ -33,6 +33,7 @@ adh AD Holdings Plc. | |||
adi Analog Devices, Inc. | |||
advantech Advantech Corporation | |||
aeroflexgaisler Aeroflex Gaisler AB | |||
aesc aesc silicon |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
All lower-case?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Changed the name everywhere and capitalized it.
dts/riscv/aesc/nitrogen.dtsi
Outdated
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Here it's called nitrogen
elsewhere it's simply n
? Can we use nitrogen
all-over?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I would like to stick to ElemRV-N
at board level since that's the actual chip name. I'm fine with renaming the device-tree to elemrn-nitrogen.dtsi
if that makes it better.
soc/aesc/vexriscv/Kconfig.soc
Outdated
# Copyright (c) 2025 aesc silicon | ||
# SPDX-License-Identifier: Apache-2.0 | ||
|
||
config SOC_FAMILY_AESC_VEXRISCV |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I'm a bit confused by the whole aesc
, vexrisc
, nitrogen
, elemrv
, n
naming here. Is the family really vexriscv?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Actually after checking this comment I figured out that SOC_FAMILY_AESC_VEXRISCV
is wrong and not required at all. I removed all these configs here.
aesc silicon is a startup focused on developing open-source silicon solutions. Link: https://github.com/aesc-silicon/ElemRV Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
aesc silicon is a startup focused on developing open-source silicon solutions. Add a new platform to the MAINTAINERS file to ensure changes get reviewed. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
a62e2ac
to
e34bf89
Compare
@@ -0,0 +1,100 @@ | |||
/** @file |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This seems too vendor-specific to be placed here, should this be in soc/aesc/...
and exposed via zephyr_include_directories(.)
instead?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
good idea! I was not very happy about the location too.
e34bf89
to
02b631a
Compare
Currently, the only available platform is Nitrogen, featuring a VexRiscv CPU that boots from external SPI flash and runs code from external HyperRAM. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
Add minimal support for the aesc silicon UART IP core. This core includes an internal clock divider and supports flexible frame configurations, allowing for variable data length, parity, and stop bit settings. The current driver version does not support interrupts. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
ElemRV-N is based on the nitrogen SoC platform. Add the base nitrogen device-tree and one for elemrv-n. The elemrv-n device-tree will contain all IP cores later. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
ElemRV-N is an end-to-end open-source microcontroller. This patch adds basic support for the platform with any interfaces. They will be added later since drivers are missing completly. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
Add a note about initial support for ElemRV-N. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
02b631a
to
f780572
Compare
|
This pull-request adds initial support for ElemRV-N [0], an end-to-end open-source RISC-V microcontroller designed using SpinalHDL successfully tapped-out with IHP's Open PDK [1].
Support for interfaces already exists on my fork and will be added after this PR got merged.
0: https://github.com/aesc-silicon/elemrv
1: https://github.com/IHP-GmbH/IHP-Open-PDK