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How to pass Yosys defines to synthesis using <code>symbiflow_synth</code> flow

#668

· carlosedp opened

on Jun 6, 2024

Negative Edge Sensitive Events Being Uploaded as Positive Edge Sensitive Events

#667

· WGeckle80 opened

on Nov 14, 2023

Replace <code>prjxray-config</code> by static configuration

#665

· amibranch opened

on Oct 8, 2023

Compiling examples returns yosys error

#664

· amibranch opened

on Oct 8, 2023

Why create ioplace first and then create constraints.place for Artix-7

#659

· lgl1227 opened

on Aug 22, 2023

Compatibility with Xilinx 7-series not Artix-7

#658

· monniaux opened

on Jun 8, 2023

Relative paths in flow configurations are handled in respect to CWD instead of file location.

#640

· kboronski-ant opened

on Sep 27, 2022

symbiflow-examples.readthedocs.io is still online

#589

· tcal-x opened

on Jul 29, 2022

Merge stdm into f4pga

#556

· umarcor opened

on May 18, 2022

Documentation structure

#555

· umarcor opened

on May 18, 2022

VHDL-synthesis using GHDL as option in addition to verific

#292

· tmeissner opened

on Jun 18, 2020

Python API documentation should be included in the Sphinx output

#289

· mithro opened

on Jun 16, 2020