GitHub - dxghost/CAP19-Pipeline: Pipelined Risc 16-bit processor implementation

CAP pipeline 16 bit processor

Name		Name	Last commit message	Last commit date
Latest commit History 19 Commits
docs		docs
instructions		instructions
7segConv.v		7segConv.v
ALU.v		ALU.v
DE2_TOP.V		DE2_TOP.V
EXE2MEM.v		EXE2MEM.v
EXEStage.v		EXEStage.v
ID2EXE.v		ID2EXE.v
IDStage.v		IDStage.v
IF2ID.v		IF2ID.v
IFStage.v		IFStage.v
MEM2WB.v		MEM2WB.v
MEMStage.v		MEMStage.v
Readme.md		Readme.md
WBStage.v		WBStage.v
adder.v		adder.v
conditionChecker.v		conditionChecker.v
controller.v		controller.v
dataMem.v		dataMem.v
defines.v		defines.v
forwarding.v		forwarding.v
hazardDetection.v		hazardDetection.v
instruction.txt		instruction.txt
instructionMem.v		instructionMem.v
mux.v		mux.v
regFile.v		regFile.v
register.v		register.v
signExtend.v		signExtend.v
testbench.v		testbench.v
topLevelCircuit.v		topLevelCircuit.v

Provide feedback