Logic Minimization in Python
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Updated
Mar 23, 2024 - Python
Logic Minimization in Python
Combinational ATPG generator based on D-Algorithm
Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing
Finding all possible paths between input and output in a given Combinational Circuit.
Spring 2024 NYCU Integrated Circuit Design Laboratory (ICLAB)
This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.
Considering combinational logic circuit (bipartite graph) as adjacent list and enumerate all the paths from input to output. Visualise gate-level verilog code as a directed graph. Networkx library was used to draw the graphs.
Logic gate implementation, circuit optimization, fsm controller hardware implementation, cos() calculator circuit; Fall 2021
Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/
This is a projects have been completed through 2 parts of nand2tetris course on coursera.
Analyze the combine with and without the repetition. (SOON)
8 Bit Calculator fully using logic gates and plexers
Implementing basic Electrical Engineering Concepts in Python
Course Assignment - Foundations of VLSI CAD - Autumn Semester 2022 - Indian Institute of Technology Bombay
MUX VHDL | Układ kombinacyjny VHDL
This repository contains the verilog implementation of basic combinational and sequential digital circuits.
Designed an automated non-ALU Double-Digit Calculator Digital Circuit PCB model in Circuit Maker
It contains the VHDL coding of basic combinational and sequential circuits as well as top level design including Datapath and Controller
A basic combinational circuit designed to detect if the given 4-bit binary number is prime or not.
Verilog practice and solutions on HDLBits website
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