HARDWARE AND EMBEDDED SECURITY course, MSc in Cybersecurity, University of Pisa
The purpose of this project is to gain an understanding of the design flow of a hardware module. The module in question is an implementation of a hardware accelerator of the Rotary Substituition Table based cipher module, as per the project specification rot_sub_table_enc_module.pdf. Implementation details and project report can be found in report_hw_project.pdf.
Cyclone V
- Modelsim
- Quartus