ADCV2 - Switch buffered readings to use DMA #905
+188
−89
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Summary
This PR switches the buffered reading implementations of the ADC/FutureADC to use DMA transfers rather than trying to do it via the CPU in free running mode.
This is because, at high ADC clock speeds, and low CPU clock speeds, it is very easy (Especially with ISRs running), to encounter ADC overrun errors when trying to read into an array.
By using DMA, this can be avoided completely.
For consistency reason, DMA Blocking reading is only for ADC, and DMA Async reading is only for FutureADC, even though, DMA Async reading can be done without a FutureADC (Since it does not depend on ADC IRQs)
No examples were changed here since there was no existing example using buffered ADC reading