Refactor tutorial 13

Author: andre-richter

Diff for: 13_integrated_testing/Cargo.toml

@@ -44,5 +44,5 @@ name = "00_interface_sanity_console"
 harness = false
 
 [[test]]
-name = "02_arch_exception_handling"
+name = "02_arch_exception_handling_sync_page_fault"
 harness = false

Diff for: 13_integrated_testing/Makefile

@@ -22,7 +22,7 @@ ifeq ($(BSP),rpi3)
 	QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
 	OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
 	JTAG_BOOT_IMAGE   = jtag_boot_rpi3.img
-	LINKER_FILE       = src/bsp/rpi/link.ld
+	LINKER_FILE       = src/bsp/raspberrypi/link.ld
 	RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
 	TARGET            = aarch64-unknown-none-softfloat
@@ -33,7 +33,7 @@ else ifeq ($(BSP),rpi4)
 	# QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
 	OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
 	JTAG_BOOT_IMAGE   = jtag_boot_rpi4.img
-	LINKER_FILE       = src/bsp/rpi/link.ld
+	LINKER_FILE       = src/bsp/raspberrypi/link.ld
 	RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
@@ -89,8 +89,7 @@ $(OUTPUT): $(CARGO_OUTPUT)
 	$(OBJCOPY_CMD) $< $(OUTPUT)
 
 doc:
-	cargo xdoc --target=$(TARGET) --features bsp_$(BSP) --document-private-items
-	xdg-open target/$(TARGET)/doc/libkernel/index.html
+	cargo xdoc --target=$(TARGET) --features bsp_$(BSP) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:

Diff for: 13_integrated_testing/README.md

@@ -2,29 +2,27 @@
 //
 // Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
 
-//! AArch64.
+//! Architectural processor code.
 
-mod exception;
-mod mmu;
-pub mod sync;
-mod time;
-
-use crate::{bsp, interface};
+use crate::{bsp, cpu};
 use cortex_a::{asm, regs::*};
 
+//--------------------------------------------------------------------------------------------------
+// Boot Code
+//--------------------------------------------------------------------------------------------------
+
 /// The entry of the `kernel` binary.
 ///
 /// The function must be named `_start`, because the linker is looking for this exact name.
 ///
 /// # Safety
 ///
 /// - Linker script must ensure to place this function at `0x80_000`.
+#[naked]
 #[no_mangle]
 pub unsafe extern "C" fn _start() -> ! {
-    const CORE_MASK: u64 = 0x3;
-
     // Expect the boot core to start in EL2.
-    if (bsp::BOOT_CORE_ID == MPIDR_EL1.get() & CORE_MASK)
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
         && (CurrentEL.get() == CurrentEL::EL::EL2.value)
     {
         el2_to_el1_transition()
@@ -39,9 +37,12 @@ pub unsafe extern "C" fn _start() -> ! {
 /// # Safety
 ///
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with ´runtime_init::init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -53,7 +54,7 @@ unsafe fn el2_to_el1_transition() -> ! {
 
     // Set up a simulated exception return.
     //
-    // First, fake a saved program status, where all interrupts were masked and SP_EL1 was used as a
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
     // stack pointer.
     SPSR_EL2.write(
         SPSR_EL2::D::Masked
@@ -63,99 +64,38 @@ unsafe fn el2_to_el1_transition() -> ! {
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to init().
-    ELR_EL2.set(crate::runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::BOOT_CORE_STACK_START);
+    SP_EL1.set(bsp::cpu::BOOT_CORE_STACK_START);
 
-    // Use `eret` to "return" to EL1. This will result in execution of `reset()` in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
     asm::eret()
 }
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static TIMER: time::Timer = time::Timer;
-static MMU: mmu::MMU = mmu::MMU;
-
-//--------------------------------------------------------------------------------------------------
-// Implementation of the kernel's architecture abstraction code
+// Public Code
 //--------------------------------------------------------------------------------------------------
 
 pub use asm::nop;
 
 /// Spin for `n` cycles.
+#[inline(always)]
 pub fn spin_for_cycles(n: usize) {
     for _ in 0..n {
         asm::nop();
     }
 }
 
-/// Return a reference to a `interface::time::TimeKeeper` implementation.
-pub fn timer() -> &'static impl interface::time::Timer {
-    &TIMER
-}
-
-/// Pause execution on the calling CPU core.
+/// Pause execution on the core.
 #[inline(always)]
 pub fn wait_forever() -> ! {
     loop {
         asm::wfe()
     }
 }
 
-/// Enable exception handling.
-///
-/// # Safety
-///
-/// - Changes the HW state of the processing element.
-pub unsafe fn enable_exception_handling() {
-    exception::set_vbar_el1();
-}
-
-/// Return a reference to an `interface::mm::MMU` implementation.
-pub fn mmu() -> &'static impl interface::mm::MMU {
-    &MMU
-}
-
-/// Information about the HW state.
-pub mod state {
-    use crate::arch::PrivilegeLevel;
-    use cortex_a::regs::*;
-
-    /// The processing element's current privilege level.
-    pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
-        let el = CurrentEL.read_as_enum(CurrentEL::EL);
-        match el {
-            Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
-            Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
-            Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
-            _ => (PrivilegeLevel::Unknown, "Unknown"),
-        }
-    }
-
-    /// Print the AArch64 exceptions status.
-    #[rustfmt::skip]
-    pub fn print_exception_state() {
-        use super::{
-            exception,
-            exception::{Debug, SError, FIQ, IRQ},
-        };
-        use crate::info;
-
-        let to_mask_str = |x| -> _ {
-            if x { "Masked" } else { "Unmasked" }
-        };
-
-        info!("      Debug:  {}", to_mask_str(exception::is_masked::<Debug>()));
-        info!("      SError: {}", to_mask_str(exception::is_masked::<SError>()));
-        info!("      IRQ:    {}", to_mask_str(exception::is_masked::<IRQ>()));
-        info!("      FIQ:    {}", to_mask_str(exception::is_masked::<FIQ>()));
-    }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------

Diff for: 13_integrated_testing/kernel

@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}

Diff for: 13_integrated_testing/kernel8.img

@@ -2,8 +2,8 @@
 //
 // Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
 
-/// Call the function provided by parameter `\handler` after saving exception context. Provide the
-/// context as the first parameter to '\handler'.
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
     // Make room on the stack for the exception context.
     sub    sp,  sp,  #16 * 17
@@ -52,16 +52,19 @@
 //--------------------------------------------------------------------------------------------------
 .section .exception_vectors, "ax", @progbits
 
-// Align by 2^11 bytes, as demanded by the AArch64 spec. Same as ALIGN(2048) in an ld script.
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
 
 // Export a symbol for the Rust code to use.
 __exception_vector_start:
 
 // Current exception level with SP_EL0.
+//
 // .org sets the offset relative to section start.
 //
-// It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
 .org 0x000
     CALL_WITH_CONTEXT current_el0_synchronous
 .org 0x080
@@ -81,7 +84,7 @@ __exception_vector_start:
 .org 0x380
     CALL_WITH_CONTEXT current_elx_serror
 
-// Lower exception level, aarch64
+// Lower exception level, AArch64
 .org 0x400
     CALL_WITH_CONTEXT lower_aarch64_synchronous
 .org 0x480
@@ -91,7 +94,7 @@ __exception_vector_start:
 .org 0x580
     CALL_WITH_CONTEXT lower_aarch64_serror
 
-// Lower exception level, aarch32
+// Lower exception level, AArch32
 .org 0x600
     CALL_WITH_CONTEXT lower_aarch32_synchronous
 .org 0x680
@@ -105,6 +108,8 @@ __exception_vector_start:
 //--------------------------------------------------------------------------------------------------
 // Helper functions
 //--------------------------------------------------------------------------------------------------
+.section .text
+
 __exception_restore_context:
     ldr    w19,      [sp, #16 * 16]
     ldp    lr,  x20, [sp, #16 * 15]