Set-Reset latch implemented with 74LS02 NOR gates.
This circuit is another implementation of a Set-Reset flip-flop, this time using NOR gates. Sometimes this is referred to as a "NOR Latch". A 74LS02 is used to provide the two NOR gates required.
See the LEAP#061 SRLatch circuit for an implementation using BJTs.
Ben Eater has a great video explaining SR latch behaviour:
| Set(t) | Reset(t) | Output Q(t+1) |
|---|---|---|
| 0 | 0 | no change |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | invalid state |
