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Learning _(:з」∠)_
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Starred repositories

4 stars written in Verilog
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A small, light weight, RISC CPU soft core

Verilog 1,365 161 Updated Feb 6, 2025

Repository for basic (and not so basic) Verilog blocks with high re-use potential

Verilog 562 140 Updated Mar 15, 2018

RISC-V SingleCycle/Pipeline CPU (lab of ZJU Computer System Series)

Verilog 15 1 Updated Jul 6, 2023

Slides and demo code for the experiment of Computer Logic of ZJU.

Verilog 6 Updated Aug 2, 2023
4 stars written in Verilog