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Pull requests: llvm/circt

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Pull requests list

[FIRRTL] Canonicalze and(cat(a,b), const) -> cat(and(a, high(const)),…
#5904 opened Aug 22, 2023 by uenoku Loading…
5
[CMake] Respect CMAKE_INSTALL_PACKAGEDIR for install tree
#5829 opened Aug 11, 2023 by nickelpro Loading…
11
[Seq] Lower FirRomOp to HWModuleGeneratedOp
#5800 opened Aug 8, 2023 by vowstar Loading…
14
[Seq] Add FirRom op
#5798 opened Aug 8, 2023 by vowstar Loading…
12
[NFC][HW] Add container class for n-valued logic constants
#5793 opened Aug 7, 2023 by fzi-hielscher Loading…
1
[PyCDE] Add bit pattern
#5786 opened Aug 6, 2023 by Dragon-Git Loading…
9
[WIP][HW] Add externalizeable interface and externalization pass
#5719 opened Jul 28, 2023 by mortbopet • Draft
1
[NFC] Narrow trait used for InstanceGraph
#5706 opened Jul 27, 2023 by darthscsi • Draft
14
[PyCDE] Support more types inputs of fsm module
#5688 opened Jul 26, 2023 by Dragon-Git Loading…
1
[Firtool] Apply LowerIntrinsics in parse-only mode
#5686 opened Jul 26, 2023 by uenoku Loading…
6
[RFC][HW] Type(s) for n-valued logic
#5622 opened Jul 18, 2023 by fzi-hielscher • Draft
5
[FIRRTL] Simpler, faster width inference
#5571 opened Jul 12, 2023 by darthscsi • Draft
4
[HW] Add a type for modules
#5350 opened Jun 9, 2023 by darthscsi • Draft
1
Add memory synthesis initialization flag to firtool. Fixes #4752
#5203 opened May 15, 2023 by carlosedp Loading…
1
14
[ExportVerilog] Drop alignment, explore pretty-printing types/structs. (draft/experimenting) ExportVerilog
#5189 opened May 12, 2023 by dtzSiFive • Draft
1
[HW] Apply some clang-tidy suggestions HW Involving the `hw` dialect
#5132 opened May 4, 2023 by maerhart Loading…
5
[FIRRTL] Match register value to reset value
#5072 opened Apr 24, 2023 by darthscsi Loading…
11
[SCFToCalyx] Add support for sequential read MemRefType memories Calyx The Calyx dialect
#4857 opened Mar 20, 2023 by xerpi Loading…
13
[FIRRTL] Move sub-index verification to constraint (not type inference), change lower types handling of OOB constant sub-access
#4797 opened Mar 9, 2023 by seldridge Loading…
1
4
[FIRRTL] Super Strict Connect: Eliminate all other connects
#4773 opened Mar 6, 2023 by darthscsi • Draft
[GrandCentral] Represent GrandCentral interfaces as a special FIRRTL Module
#4741 opened Feb 28, 2023 by prithayan • Draft
12
[FIRRTL] Wire To Node Conversion Pass
#4644 opened Feb 10, 2023 by darthscsi • Draft
1
[HandshakeToHW] handshake instance and external_instance HandshakeToHW
#4613 opened Feb 2, 2023 by Stippe123 • Draft
34
[PrettifyVerilog] Don't sink expressions if their values might be changed in procedural regions
#4590 opened Jan 25, 2023 by uenoku • Draft
1
2
[FIRRTL] Indeterminate value analysis
#4533 opened Jan 11, 2023 by darthscsi Loading…
1
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