·
23 commits
to main
since this release
What's Changed
- [MemoryBanking] Should not overwrite banking factor/dimension when resolving attribute values by @jiahanxie353 in #8267
- [LLHD] Add dedicated Mem2Reg pass by @fabianschuiki in #8244
- [ESI][XRT] Implement "Indirect MMIO" by @teqdruid in #8273
- [ImportVerilog] Add option to lower always @* as always_comb by @fabianschuiki in #8271
- [LLHD] Support conditional drives in mem2reg by @fabianschuiki in #8278
- [ESI][BSP] Simple ToHost DMA engine by @teqdruid in #8207
- [LLHD] Support drives with delta delay in mem2reg by @fabianschuiki in #8279
- [AffineParallelUnroll] Fix empty map lookup; move canonicalization passes before
MemoryConflictResolver
by @jiahanxie353 in #8282 - [circt-verilog-lsp-server] Add Verilog Language Server by @uenoku in #8234
- [SMT][CAPI] Add more SMT C API by @Clo91eaf in #8274
- [MemoryBanking] Memory banking supports multiple banking factors/dimensions config by @jiahanxie353 in #8277
- [Python] Declare a separate sub-target for support sources by @maerhart in #8243
- [sim] Add emission for plusargs for UPF simulations by @youngar in #8272
Full Changelog: firtool-1.107.0...firtool-1.108.0