21 Pull requests merged by 9 people

• [CIR][CUDA] Support for built-in CUDA surface type

  #1455 merged Mar 8, 2025

• [CIR][CIRGen][Neon] Make vrnda emit RoundOp directly

  #1453 merged Mar 7, 2025

• [CIR][CIRGen][TBAA] Add support for pointer tbaa

  #1452 merged Mar 7, 2025

• [CIR][CIRGen][Builtin][Neon] Lower neon vaddlv_u32

  #1451 merged Mar 7, 2025

• [CIR][CIRGen][Builtin][Neon] Lower neon vaddlvq_s32

  #1450 merged Mar 7, 2025

• [CIR][CIRGen][Builtin][Neon] Lower vcagtd_f64

  #1448 merged Mar 7, 2025

• [CIR] Fix attributes lowering for GlobalOp

  #1447 merged Mar 7, 2025

• [CIR][CIRGen][TBAA] Add support for BitInt

  #1443 merged Mar 7, 2025

• [CIR][CIRGen][Neon] Make vrndns emit RoundEvenOp directly

  #1434 merged Mar 6, 2025

• [CIR] Disable -Woverloaded-virtual when compiling with gcc

  #1440 merged Mar 5, 2025

• [CIR] Add option to emit MLIR in LLVM dialect.

  #1316 merged Mar 5, 2025

• [CIR][CIRGen][TBAA] Add support for enum

  #1435 merged Mar 5, 2025

• [CIR][CUDA] Generate registration function (Part 1)

  #1415 merged Mar 5, 2025

• [CIR][CUDA] Lowering device and shared variables

  #1438 merged Mar 5, 2025

• [CIR][CodeGen] Fix std::ofstream fail during CodeGen

  #1437 merged Mar 5, 2025

• [CIR][CUDA] Treat nvptx triple as alias for nvptx64

  #1420 merged Mar 5, 2025

• [CIR][Lowering][TBAA] distinct C and C++

  #1406 merged Mar 5, 2025

• [CIR][CIRGen][Builtin][Neon] Lower vcaged_f64

  #1432 merged Mar 4, 2025

• [CIR] Change AtomicFenceOp's syncscope to OptionalAttr

  #1429 merged Mar 4, 2025

• [CIR][CIRGen] Move CIRGenModule::getTargetCIRGenInfo() to CIRGenModule.cpp

  #1426 merged Mar 4, 2025

• [CIR][CUDA] Fix destructor behaviour

  #1422 merged Mar 4, 2025

10 Pull requests opened by 6 people

• [CIR][CUDA] Register __global__ functions

  #1441 opened Mar 5, 2025

• [CIR][CUDA] implement cuda constant variables

  #1444 opened Mar 6, 2025

• [CIR][CUDA] Fix address space values for NVPTX

  #1445 opened Mar 6, 2025

• [CIR][CIRGen][Builtin][Neon] Lower neon vcages_f32

  #1449 opened Mar 6, 2025

• [CIR][CUDA] Add target-specific attributes

  #1457 opened Mar 7, 2025

• [CIR][CUDA] Support builtin CUDA variables

  #1458 opened Mar 7, 2025

• [CIR][CUDA] Support for in built texture type

  #1459 opened Mar 8, 2025

• [CIR][CIRGen][Builtin][Neon] Lower neon vmaxv_f32

  #1460 opened Mar 8, 2025

• [CIR][CUDA] Miscellanous bugfixes

  #1462 opened Mar 9, 2025

• [CIR][CIRGen][TBAA] Add support for vtable pointer

  #1463 opened Mar 10, 2025

1 Issue closed by 1 person

• Invalid iterators in LoweringPreparePass

  #1234 closed Mar 6, 2025

3 Issues opened by 2 people

• test/CIR/CodeGen/vbase.cpp broke during rebase

  #1461 opened Mar 8, 2025

• Variadic functions broke during rebase

  #1456 opened Mar 7, 2025

• Lowering of `GlobalOp` ignores attributes

  #1442 opened Mar 5, 2025

9 Unresolved conversations

Sometimes conversations happen on old items that aren’t yet closed. Here is a list of all the Issues and Pull Requests with unresolved conversations.

• [CIR][CIRGen][builtin] handle `__lzcnt`

  #1382 commented on Mar 7, 2025 • 10 new comments

• [CIR] Implement ::verify for cir.atomic.xchg and cir.atomic.cmp_xchg

  #1431 commented on Mar 7, 2025 • 4 new comments

• [ThroughMLIR] can not lower c array correctly

  #1405 commented on Mar 3, 2025 • 0 new comments

• Miss `cir::StructType` documentation

  #1367 commented on Mar 5, 2025 • 0 new comments

• Enhance cir.atomic.cmp_xchg and cir.atomic.xchg verifiers

  #1378 commented on Mar 5, 2025 • 0 new comments

• Lowering through MLIR standard dialects: class, struct, arrays and other issues

  #1219 commented on Mar 6, 2025 • 0 new comments

• [CIR][CIRGen] Replace LLVMIntrinsicCallOp with ACosOp in __builtin_elementwise_acos

  #1425 commented on Mar 5, 2025 • 0 new comments

• [CIR][CIRGen][builtin] handle _mm_prefetch

  #1427 commented on Mar 5, 2025 • 0 new comments

• [CIR] Add default alignment to createStore

  #1433 commented on Mar 4, 2025 • 0 new comments