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rohd-hcl Public
Forked from intel/rohd-hclA hardware component library developed with ROHD.
Dart BSD 3-Clause "New" or "Revised" License UpdatedOct 24, 2024 -
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hashable Public
Forked from haskell-unordered-containers/hashableA class for types that can be converted to a hash value
Haskell BSD 3-Clause "New" or "Revised" License UpdatedAug 11, 2024 -
monorepo Public
Experimental Mono Repo that builds out EDA tools for chip design for Haskell
Starlark UpdatedJul 2, 2024 -
bazel_rules_hdl Public
Forked from hdl/bazel_rules_hdlHardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Starlark Apache License 2.0 UpdatedSep 15, 2023 -
rules_dart Public
Forked from cbracken/rules_dartDart rules for Bazel
Starlark Apache License 2.0 UpdatedDec 29, 2022 -
EIPs Public
Forked from ethereum/EIPsThe Ethereum Improvement Proposal repository
Solidity Creative Commons Zero v1.0 Universal UpdatedSep 20, 2022 -
llvm-project-saw Public
Forked from llvm/llvm-projectSpecial llvm project with my own change
UpdatedAug 3, 2022 -
envsubst-action Public
Forked from danielr1996/envsubst-actionGithub Action for envsubst
Dockerfile MIT License UpdatedDec 9, 2021 -
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riscv-dev-container Public
General development container for digital design and riscv cores
Dockerfile UpdatedSep 19, 2021 -
vscode-terosHDL Public
Forked from TerosTechnology/vscode-terosHDLVHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
JavaScript GNU General Public License v3.0 UpdatedSep 18, 2021 -
lowrisc_prim Public
lowRISC primitives separated out in its own repository for reuse in other projects
SystemVerilog UpdatedSep 11, 2021 -
sv2v Public
Forked from zachjs/sv2vSystemVerilog to Verilog conversion
Haskell BSD 3-Clause "New" or "Revised" License UpdatedSep 11, 2021 -
opentitan Public
Forked from lowRISC/opentitanOpenTitan: Open source silicon root of trust
SystemVerilog Apache License 2.0 UpdatedSep 10, 2021 -
sv_novel_components Public
Novel components from IEEE papers implemented as practice
C++ UpdatedSep 1, 2021 -
SymbiYosys Public
Forked from YosysHQ/sbySymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
Python Other UpdatedAug 25, 2021 -
sv-lbnf Public
Labelled Backus–Naur Form (LBNF) of SystemVerilog for front-end use with BNFC
UpdatedAug 23, 2021 -
sv_common_components Public archive
Common (and maybe generic) components for SystemVerilog with FuseSoc support
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rtl-starter Public
FuseSoC template for starting a SystemVerilog design project with simple Verilator Testbench
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veridian Public
Forked from vivekmalneedi/veridianA SystemVerilog Language Server
Rust MIT License UpdatedAug 8, 2021 -
slang Public
Forked from MikePopoloski/slangSystemVerilog compiler and language services
C++ MIT License UpdatedAug 4, 2021 -
guild-operators Public
Forked from cardano-community/guild-operatorsArtifacts and scripts created by Guild operators
Shell MIT License UpdatedJul 23, 2021 -
tatum-blockchain-connector Public
Forked from turinglabsorg/tatum-blockchain-connectorTypeScript MIT License UpdatedJul 23, 2021 -
cardanocli-js Public
Forked from miguelaeh/cardanocli-jsWrapping the cardano-cli inside JavaScript
JavaScript UpdatedJul 21, 2021 -
developer-portal Public
Forked from cardano-foundation/developer-portalThe Cardano Developer Portal
JavaScript MIT License UpdatedJul 18, 2021 -
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Cores-SweRV Public
Forked from chipsalliance/Cores-VeeR-EH1SweRV EH1 core
SystemVerilog Apache License 2.0 UpdatedApr 13, 2020 -