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IHP Open source SG13G2 Tape Out on April 2025 [Testfield <>]

Makefile 3 5 Updated Mar 7, 2025

Pi Pico/RP2040 Simulator with advanced functionality.

2 Updated Mar 13, 2025

Microphotography viewer based on Leaflet.js

JavaScript 43 5 Updated Dec 15, 2023

HPDL 1414 Pmod Module

Verilog 2 Updated Mar 6, 2025

Firmware for FarmHub devices

C++ 2 Updated Mar 13, 2025

Structural Netlist API (and more) for EDA post synthesis flow development

Verilog 92 14 Updated Mar 2, 2025

CH32V003-based 2xSNES controller interface PMOD

C++ 5 Updated Feb 11, 2025

Atari 2600 Open-source System-on-Chip (SoC)

Python 31 2 Updated Nov 19, 2024

A backup decryptor and OTP generator for the vault of the Aegis Authenticator Android app.

Python 16 2 Updated Feb 11, 2025

SimIO is a collection of virtualized components to interact with a (System)Verilog simulation.

Python 9 Updated Sep 2, 2024

An JLC PCB Fabrication Plugin for KiCad

Python 415 66 Updated Jan 13, 2025

Convert any LCSC components (including EasyEDA) to KiCad library

Python 851 88 Updated Feb 11, 2025

Example SDL3 application for ESP32

C 11 Updated Feb 25, 2025

AudioSample is an optimized numpy-like audio manipulation library, created for researchers, used by developers.

Jupyter Notebook 87 3 Updated Jan 21, 2025

HV prototyping for sky130 sonos program/erase

1 Updated Jul 16, 2024

Recipe: Persistent Network Configuration in WSL 2 using Hyper-V Virtual Switch

48 7 Updated Mar 20, 2024

Submission template for Tiny Tapeout 7 - Chisel HDL Projects

Tcl 3 1 Updated Jul 26, 2024

Waveform Viewer Extension for VScode

TypeScript 112 4 Updated Mar 12, 2025

Curriculum for a university course to teach chip design using open source EDA tools

Jupyter Notebook 57 12 Updated Oct 21, 2023

RISC-V RV32E core designed for minimal area

Verilog 13 1 Updated Nov 17, 2024

Peggy: Parser generator for JavaScript

JavaScript 1,025 65 Updated Dec 25, 2024

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

C 366 25 Updated Mar 13, 2025

Running FreeRTOS on an STM32 Nucleo-C031C6 with Wokwi Simulation in VSCode.

C 12 3 Updated Feb 23, 2024

The next generation of OpenLane, rewritten from scratch with a modular architecture

Python 275 56 Updated Feb 26, 2025

Transform URLs in strings to actual links.

TypeScript 9 Updated Feb 17, 2022

Spike, a RISC-V ISA Simulator

C 2,613 911 Updated Mar 6, 2025

Performance-optimized container images for building Zephyr RTOS applications.

Dockerfile 49 1 Updated Oct 22, 2024

Charliplexing is a scheme for multiplexing access to components, like LEDs, switches, touch sensors etc.

JavaScript 4 Updated Jan 7, 2024

An Intellij plugin that integrates the Wokwi simulator into Jetbrains IDEs such as CLion and RustRover.

Kotlin 10 Updated Feb 14, 2025
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