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1. RPTU-EIS/Security-Conscious-Hardware RPTU-EIS/Security-Conscious-Hardware Public

   Collection of experiments on data-oblivious hardware designs that dynamically adjust their latency

   SystemVerilog 1 1

2. Binary-GCD-Verilog Binary-GCD-Verilog Public

   This is a hardware module written in Verilog that computes the greatest common divisor (GCD) of two integer numbers.

   SystemVerilog

3. Project-Euler_1-100 Project-Euler_1-100 Public

   Python 1

4. advent-of-code advent-of-code Public

   Python