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1. verilog-axi verilog-axi Public

   Forked from alexforencich/verilog-axi

   Verilog AXI components for FPGA implementation

   Verilog 1

2. core_sdram_axi4 core_sdram_axi4 Public

   Forked from ultraembedded/core_sdram_axi4

   SDRAM controller with AXI4 interface

   C++ 1

3. AXI4 AXI4 Public

   Forked from Vikkdsun/AXI4

   A AXI4 project of Verilog.

   Verilog 1

4. AXI4-Interconnect AXI4-Interconnect Public

   Forked from atfox272/AXI4-Interconnect

   RTL code for AXI4 Interconnect (Verilog). Supports weighted round-robin arbitration, n-channel master, 4Kb splitting, reorder transaction.

   Verilog 1

5. LCH-CICC LCH-CICC Public

   谨以此纪念我的第一次集创赛和对数字IC的热爱

   1

6. cordic_axi_stream cordic_axi_stream Public

   Forked from zaporozhets/cordic_axi_stream

   CORDIC IP core with AXI stream interface

   SystemVerilog