Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end produ…

🔗 Some useful websites for programmers.

Vim-fork focused on extensibility and usability

Linux kernel source tree

Verilog Ethernet components for FPGA implementation

Fully parametrizable combinatorial parallel LFSR/CRC module

Verilog PCI express components

32-bit Superscalar RISC-V CPU

Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy machine and Moore machine, Number of 1s, Binary to Gray Conversi…

Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.

DDR2 memory controller written in Verilog

riscv-ctb-challenge-JishDas created by GitHub Classroom

Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip …

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog