gbdev/pandocs

Specified the status of the VRAM DMA register once a transfer is done.

gbdev/pandocs

#624

· Phidias618 opened

on Sep 14, 2025

· Changes requested

2

Wattages mentioned don't say under what kind of load

#623

· ReiquelApplegate opened

on Sep 12, 2025

2

Bring back the old CPU instruction set table

#620

· SnDream opened

on Sep 4, 2025

4

run_dma delay actually waits 166 machine cycles

#619

· ReiquelApplegate opened

on Aug 20, 2025

4

Disabling LCD on DMG before invoking STOP leaves it enabled?

#615

· ReiquelApplegate opened

on Aug 17, 2025

Restore links to gbdev.gg8.se that were changed to archive.org mirror links

#614

· nitro2k01 opened

on Aug 13, 2025

1

Documentation of LCDC.2 never mentions which of the two values is for what size

#612

· Ptival opened

on Aug 1, 2025

3

'Check for dead links' CI is broken

help wanted

#610

· avivace opened

on Jul 17, 2025

Update theme/highlight.js with latest hardware.inc constants

#604

· Rangi42 opened

on Jun 14, 2025

Joypad interrupt behavior is described incorrectly

#601

· calc84maniac opened

on Jun 8, 2025

Merge tip in "Tile Maps" with the Window mid-frame paragraph in Scrolling

#592

· avivace opened

on Mar 8, 2025

Explain Window's mid-scanline behaviour (changing LCDC.5, WX and WY mid-scanline)

#591

· avivace opened

on Mar 8, 2025

When exactly can monochrome consoles read from wave RAM?

#590

· jeffythedragonslayer opened

on Mar 7, 2025

Missing list of MBC types?

#589

· ReiquelApplegate opened

on Mar 1, 2025

4

Research and document KEY0 (CPU mode register) and PGB modes

#581

· alloncm opened

on Dec 9, 2024

MBC1M addressing diagram is incorrect

#579

· epavese opened

on Dec 3, 2024

2

Ambiguities of mode 3 penalties

#578

· nummacway opened

on Nov 26, 2024

MBC7 Rumble

#575

· dcerchia opened

on Oct 28, 2024

2

"Avoiding audio pops" tip is misleading

content

enhancement

#571

· jkotlinski opened

on Sep 28, 2024

Fine SCX timing is confusingly described

content

enhancement

#567

· Ptival opened

on Sep 13, 2024

1

the 'linkcheck' preprocessor should not block the build

ci/cd

#566

· avivace opened

on Sep 12, 2024

4

Document that SB can be written after SC

research

#564

· nitro2k01 opened

on Sep 6, 2024

1

Does the doc ever actually explain which bit value corresponds to which addressing mode?

content

enhancement

#563

· Ptival opened

on Sep 4, 2024

1

Document more HDMA behaviours

content

good first issue

#561

· ISSOtm opened

on Aug 18, 2024

Use asymmetric VRAM Tile Data example

enhancement

#559

· nummacway opened

on Jul 3, 2024

2

Provide feedback

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Specified the status of the VRAM DMA register once a transfer is done.

Wattages mentioned don't say under what kind of load

Bring back the old CPU instruction set table

run_dma delay actually waits 166 machine cycles

Disabling LCD on DMG before invoking STOP leaves it enabled?

Restore links to gbdev.gg8.se that were changed to archive.org mirror links

Documentation of LCDC.2 never mentions which of the two values is for what size

'Check for dead links' CI is broken

Update theme/highlight.js with latest hardware.inc constants

Joypad interrupt behavior is described incorrectly

Merge tip in "Tile Maps" with the Window mid-frame paragraph in Scrolling

Explain Window's mid-scanline behaviour (changing LCDC.5, WX and WY mid-scanline)

When exactly can monochrome consoles read from wave RAM?

Missing list of MBC types?

Research and document KEY0 (CPU mode register) and PGB modes

MBC1M addressing diagram is incorrect

Ambiguities of mode 3 penalties

MBC7 Rumble

"Avoiding audio pops" tip is misleading

Fine SCX timing is confusingly described

the 'linkcheck' preprocessor should not block the build

Document that SB can be written after SC

Does the doc ever actually explain which bit value corresponds to which addressing mode?

Document more HDMA behaviours

Use asymmetric VRAM Tile Data example

Issues

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