[X86][GlobalIsel] support G_FABS #136718

mahesh-attarde · 2025-04-22T15:44:33Z

Adds support for G_FABS for f80.

llvmbot · 2025-04-22T15:45:07Z

@llvm/pr-subscribers-llvm-globalisel

Author: Mahesh-Attarde (mahesh-attarde)

Changes

Adds support for G_FABS for f80.

Full diff: https://github.com/llvm/llvm-project/pull/136718.diff

2 Files Affected:

(modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+5)
(added) llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll (+20)

diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index f008cb1bea839..d8c1fb5717df8 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -466,6 +466,11 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
                (UseX87 && typeInSet(0, {s80})(Query));
       });
 
+  //TODO: f32 and f64 FABS require xmm support
+  getActionDefinitionsBuilder(G_FABS)
+      .legalFor(UseX87, {s8, s80})
+      .lower();
+
   // fp comparison
   getActionDefinitionsBuilder(G_FCMP)
       .legalFor(HasSSE1 || UseX87, {s8, s32})
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
new file mode 100644
index 0000000000000..39ce3a492a33c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -mattr=+x87,-sse,-sse2  | FileCheck %s -check-prefixes=GISEL
+
+define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
+; X64-LABEL: test_x86_fp80_abs:
+; X64:       # %bb.0:
+; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
+; X64-NEXT:    fabs
+; X64-NEXT:    retq
+;
+; GISEL-LABEL: test_x86_fp80_abs:
+; GISEL:       # %bb.0:
+; GISEL-NEXT:    fldt {{[0-9]+}}(%rsp)
+; GISEL-NEXT:    fabs
+; GISEL-NEXT:    retq
+  %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
+  ret x86_fp80 %abs
+}

llvmbot · 2025-04-22T15:45:09Z

@llvm/pr-subscribers-backend-x86

Author: Mahesh-Attarde (mahesh-attarde)

Changes

Adds support for G_FABS for f80.

Full diff: https://github.com/llvm/llvm-project/pull/136718.diff

2 Files Affected:

(modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+5)
(added) llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll (+20)

diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index f008cb1bea839..d8c1fb5717df8 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -466,6 +466,11 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
                (UseX87 && typeInSet(0, {s80})(Query));
       });
 
+  //TODO: f32 and f64 FABS require xmm support
+  getActionDefinitionsBuilder(G_FABS)
+      .legalFor(UseX87, {s8, s80})
+      .lower();
+
   // fp comparison
   getActionDefinitionsBuilder(G_FCMP)
       .legalFor(HasSSE1 || UseX87, {s8, s32})
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
new file mode 100644
index 0000000000000..39ce3a492a33c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -mattr=+x87,-sse,-sse2  | FileCheck %s -check-prefixes=GISEL
+
+define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
+; X64-LABEL: test_x86_fp80_abs:
+; X64:       # %bb.0:
+; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
+; X64-NEXT:    fabs
+; X64-NEXT:    retq
+;
+; GISEL-LABEL: test_x86_fp80_abs:
+; GISEL:       # %bb.0:
+; GISEL-NEXT:    fldt {{[0-9]+}}(%rsp)
+; GISEL-NEXT:    fabs
+; GISEL-NEXT:    retq
+  %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
+  ret x86_fp80 %abs
+}

github-actions · 2025-04-22T15:47:19Z

✅ With the latest revision this PR passed the C/C++ code formatter.

arsenm · 2025-04-22T15:57:09Z

llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll

@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64


use explicit -global-isel=0 for dag run lines. don't need -verify-machineinstrs

why not llvm/test/CodeGen/X86/isel-fabs.ll ?

e-kud · 2025-04-22T17:02:51Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

+  //TODO: f32 and f64 FABS require xmm support
+  getActionDefinitionsBuilder(G_FABS)
+      .legalFor(UseX87, {s8, s80})
+      .lower();


Does lower generate the selectable code? Then we probably can add tests for float and double as well.

+x87,-sse,-sse2 restricts SDAG Isel for float and double. It requires SSE.
exact message SSE register return with SSE disabled.

that error comes from the globalisel code, not sdag. You can also just stop testing with those features forced off

We use X87 with and without SSE for s80. So there is no need forcing -sse.

that error comes from the globalisel code, not sdag. You can also just stop testing with those features forced off
@arsenm It appeared without gisel too.
https://godbolt.org/z/Goc3zs9qe
@e-kud I can drop using -sse 👍

mahesh-attarde · 2025-04-24T06:30:54Z

llvm/test/CodeGen/X86/isel-fabs.ll

+;
+; GISEL-LABEL: test_double_abs:
+; GISEL:       # %bb.0:
+; GISEL-NEXT:    movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF


@e-kud is that expected with Global Pointer ?

I've meant loading global variable using PLT when we need an extra load. I assume here the issue is that we can't select andq with the such large constant and we end up with mov + and. We can't select andps as SDAG. It requires to insert a value in a vector but we can't select this instruction yet because the index is of pointer type. Here was an attempt to allow matching with pointer type #111503. I'm still trying to find a good change to enable selection of vectors.

So, I'd say yes, this is expected but because of vectors, not global variables.

e-kud · 2025-04-24T13:54:43Z

llvm/test/CodeGen/X86/isel-fabs.ll

+;
+; GISEL-LABEL: test_double_abs:
+; GISEL:       # %bb.0:
+; GISEL-NEXT:    movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF


I've meant loading global variable using PLT when we need an extra load. I assume here the issue is that we can't select andq with the such large constant and we end up with mov + and. We can't select andps as SDAG. It requires to insert a value in a vector but we can't select this instruction yet because the index is of pointer type. Here was an attempt to allow matching with pointer type #111503. I'm still trying to find a good change to enable selection of vectors.

So, I'd say yes, this is expected but because of vectors, not global variables.

e-kud · 2025-04-24T13:55:07Z

llvm/test/CodeGen/X86/isel-fabs.ll

@@ -0,0 +1,52 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s  -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s -check-prefixes=GISEL


Can we add a common prefix for SDAG and GISEL? Usually we use X64 or X86 as a common prefix and something like X64-SDAG/GISEL as unique ones.

mahesh-attarde · 2025-05-01T11:54:24Z

I am working on i686 test. There seems to be something off. I am collecting information on it.

 bb.0 (%ir-block.0):
  renamable $eax = MOV32ri 2147483647
  renamable $eax = AND32rm killed renamable $eax(tied-def 0), %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (invariant load (s32) from %fixed-stack.0)
  $fp0 = COPY killed renamable $eax
  RET 0, implicit killed $fp0

This code results, This is part of lowerReturn in GISEL. I suspect fp0 should not even be created. Let me know if I am wrong.

llc: /llvm-project/llvm/lib/Target/X86/X86FloatingPoint.cpp:317: unsigned int getFPReg(const llvm::MachineOperand&): Assertion `Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"' failed.

arsenm · 2025-05-01T13:28:12Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

@@ -466,6 +466,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
               (UseX87 && typeInSet(0, {s80})(Query));
      });

+  getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s8, s80}).lower();


There is only one type index, and s8 is not a valid floating point type

mahesh-attarde · 2025-05-27T07:52:15Z

I am working on i686 test. There seems to be something off. I am collecting information on it.
 bb.0 (%ir-block.0):
  renamable $eax = MOV32ri 2147483647
  renamable $eax = AND32rm killed renamable $eax(tied-def 0), %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (invariant load (s32) from %fixed-stack.0)
  $fp0 = COPY killed renamable $eax
  RET 0, implicit killed $fp0
This code results, This is part of lowerReturn in GISEL. I suspect fp0 should not even be created. Let me know if I am wrong.
llc: /llvm-project/llvm/lib/Target/X86/X86FloatingPoint.cpp:317: unsigned int getFPReg(const llvm::MachineOperand&): Assertion `Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"' failed. 

It turns out Fp0 here is because of C calling convention with X87 enabled. we have defined it in calling covn td file. We might be missing RET register handling since we only look for ret reg as EAX or RAX in lowerReturn.

RKSimon · 2025-06-03T07:51:07Z

llvm/test/CodeGen/X86/isel-fabs.ll

-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64


drop unused FASTISEL-X64 checkprefix?

#142558 is adding test in separate PR for DAGISEL and FASTISEL

G_FABS Test update for #136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

G_FABS Test update for llvm/llvm-project#136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

mahesh-attarde · 2025-06-05T17:24:42Z

ping @e-kud @RKSimon

RKSimon · 2025-06-06T09:45:36Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

@@ -835,6 +841,43 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI,
  return true;
 }

+bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI,
+                                         MachineRegisterInfo &MRI,
+                                         LegalizerHelper &Helper) const {


clang-format this ?

RKSimon · 2025-06-06T09:48:52Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

+  Register SrcReg = MI.getOperand(1).getReg();
+  Register DstReg = MI.getOperand(0).getReg();
+  LLT Ty = MRI.getType(DstReg);
+  if (Subtarget.is32Bit()) {


I don't understand - why are you making x86_64 use a constant pool for all float types?

For functionality of abs we are using mask, in 64 bit we have masks spans 64 bit. From ISA spec, we can only encode 32 bit immediate in instruction. so we need to load 64 bit into reg and then use reg.
Are you suggesting we only use it to double type?

@mahesh-attarde I think SDAG uses constant pool because of working with xmm registers. When we don't have them we still do just a simple movabs: https://godbolt.org/z/966EGMWah

RKSimon · 2025-06-11T09:01:51Z

llvm/test/CodeGen/X86/isel-fabs.ll

@@ -41,10 +65,30 @@ define double @test_double_abs(double %arg) {
 ;
 ; FASTISEL-X86-LABEL: test_double_abs:
 ; FASTISEL-X86:       # %bb.0:
+; FASTISEL-X86-NEXT:    pushl %ebp
+; FASTISEL-X86-NEXT:    .cfi_def_cfa_offset 8


add nounwind to get rid of the cfi noise

G_FABS Test update for llvm#136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

e-kud

LGTM.

e-kud · 2025-06-11T13:55:41Z

llvm/test/CodeGen/X86/isel-fabs-x87.ll

 ; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86
 ; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86

 define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {


Probably would be nice to see how we handle floats and double without SSE.

RKSimon · 2025-06-11T14:06:59Z

llvm/test/CodeGen/X86/isel-fabs-x87.ll

 ; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86
 ; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86


can we add f32/f64 test coverage here? otherwise we've lost all x87-only fabs tests

This is known issue, we discussed it earlier while submitting test review.
#142558 (comment)

We can store the value instead of returning.

G_FABS Test update for llvm#136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

mahesh-attarde · 2025-06-23T16:10:37Z

ping @RKSimon

Adds support for G_FABS for f80. --------- Co-authored-by: mattarde <mattarde@intel.com> Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>

Fixes hidden issue in #136718. It removes custom selection code since problem was in RegBank assignment

Fixes hidden issue in llvm/llvm-project#136718. It removes custom selection code since problem was in RegBank assignment

Adds support for G_FABS for f80. --------- Co-authored-by: mattarde <mattarde@intel.com> Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>

Fixes hidden issue in llvm#136718. It removes custom selection code since problem was in RegBank assignment

llvmbot added backend:X86 llvm:globalisel labels Apr 22, 2025

mahesh-attarde changed the title ~~[X86][GlobalIsel] support fabs for f80~~ [X86][GlobalIsel] support G_FABS for f80 Apr 22, 2025

arsenm reviewed Apr 22, 2025

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RKSimon requested a review from e-kud April 22, 2025 16:37

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mahesh-attarde force-pushed the gisel_fabs branch from 127a1cd to 75b3115 Compare April 24, 2025 06:28

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mahesh-attarde force-pushed the gisel_fabs branch from 75b3115 to 3ccc01b Compare May 1, 2025 11:48

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[X86][GlobalIsel] add test for fabs isel #142558

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mahesh-attarde changed the title ~~[X86][GlobalIsel] support G_FABS for f80~~ [X86][GlobalIsel] support G_FABS Jun 3, 2025

RKSimon pushed a commit that referenced this pull request Jun 5, 2025

[X86][GlobalIsel] add test for fabs isel (#142558)

3737e7e

G_FABS Test update for #136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

llvm-sync bot pushed a commit to arm/arm-toolchain that referenced this pull request Jun 5, 2025

Automerge: [X86][GlobalIsel] add test for fabs isel (#142558)

443fd4c

G_FABS Test update for llvm/llvm-project#136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

mattarde added 8 commits June 5, 2025 09:40

[X86][GlobalIsel] support fabs for f80

d4475cb

add float and double

22e2c83

update test

0ed32a7

remove s8

8221bc6

update fabs for f32 and f64

6a58699

fix indent

db0e1cb

add x87 specific runs

f35b674

fix tst

2782568

mahesh-attarde force-pushed the gisel_fabs branch from 5bf8752 to 2782568 Compare June 5, 2025 17:20

remove unused marker

860903d

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mattarde added 3 commits June 7, 2025 04:06

fix clang format

d4d3d44

fix clang format

4838b22

remove const pool

63eebe0

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rorth pushed a commit to rorth/llvm-project that referenced this pull request Jun 11, 2025

[X86][GlobalIsel] add test for fabs isel (llvm#142558)

61bc7d2

G_FABS Test update for llvm#136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

remove noise

a718a5b

e-kud approved these changes Jun 11, 2025

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DhruvSrivastavaX pushed a commit to DhruvSrivastavaX/lldb-for-aix that referenced this pull request Jun 12, 2025

[X86][GlobalIsel] add test for fabs isel (llvm#142558)

4b88144

G_FABS Test update for llvm#136718 --------- Co-authored-by: mattarde <mattarde@intel.com>

mattarde added 2 commits June 19, 2025 04:49

add fallback

e57ab03

format extension issue

f5e5274

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Merge branch 'main' into gisel_fabs

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RKSimon merged commit 0f01cd5 into llvm:main Jun 25, 2025
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mahesh-attarde deleted the gisel_fabs branch June 25, 2025 09:56

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[X86][GlobalIsel] fix regbank issue fabs #145674

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e-kud pushed a commit that referenced this pull request Jun 30, 2025

[X86][GlobalISel] Fix RegBank issue for G_FABS (#145674)

56ef00a

Fixes hidden issue in #136718. It removes custom selection code since problem was in RegBank assignment

rlavaee pushed a commit to rlavaee/llvm-project that referenced this pull request Jul 1, 2025

[X86][GlobalIsel] support G_FABS (llvm#136718)

495310c

Adds support for G_FABS for f80. --------- Co-authored-by: mattarde <mattarde@intel.com> Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>

rlavaee pushed a commit to rlavaee/llvm-project that referenced this pull request Jul 1, 2025

[X86][GlobalISel] Fix RegBank issue for G_FABS (llvm#145674)

9266f01

Fixes hidden issue in llvm#136718. It removes custom selection code since problem was in RegBank assignment

[X86][GlobalIsel] support G_FABS #136718

[X86][GlobalIsel] support G_FABS #136718

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