[CIR] Add support for bitfields in unions #145096
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@llvm/pr-subscribers-clang Author: None (Andres-Salamanca) ChangesThis PR introduces support for bitfields inside unions in CIR. Full diff: https://github.com/llvm/llvm-project/pull/145096.diff 2 Files Affected:
diff --git a/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp b/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
index 8dbf1b36a93b2..3d50a537e676b 100644
--- a/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
@@ -655,11 +655,14 @@ void CIRRecordLowering::lowerUnion() {
// locate the "most appropriate" storage type.
for (const FieldDecl *field : recordDecl->fields()) {
mlir::Type fieldType;
- if (field->isBitField())
- cirGenTypes.getCGModule().errorNYI(recordDecl->getSourceRange(),
- "bitfields in lowerUnion");
- else
+ if (field->isBitField()) {
+ if (field->isZeroLengthBitField())
+ continue;
+ fieldType = getBitfieldStorageType(field->getBitWidthValue());
+ setBitFieldInfo(field, CharUnits::Zero(), fieldType);
+ } else {
fieldType = getStorageType(field);
+ }
// This maps a field to its index. For unions, the index is always 0.
fieldIdxMap[field->getCanonicalDecl()] = 0;
diff --git a/clang/test/CIR/CodeGen/bitfield-union.c b/clang/test/CIR/CodeGen/bitfield-union.c
new file mode 100644
index 0000000000000..72e14c5fb71f3
--- /dev/null
+++ b/clang/test/CIR/CodeGen/bitfield-union.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s --check-prefix=CIR
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll
+// RUN: FileCheck --input-file=%t-cir.ll %s --check-prefix=LLVM
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll
+// RUN: FileCheck --input-file=%t.ll %s --check-prefix=OGCG
+
+typedef union {
+ int x;
+ int y : 4;
+ int z : 8;
+} demo;
+
+// CIR: !rec_demo = !cir.record<union "demo" {!s32i, !u8i, !u8i}>
+// LLVM: %union.demo = type { i32 }
+// OGCG: %union.demo = type { i32 }
+demo d;
+
+
|
|
@llvm/pr-subscribers-clangir Author: None (Andres-Salamanca) ChangesThis PR introduces support for bitfields inside unions in CIR. Full diff: https://github.com/llvm/llvm-project/pull/145096.diff 2 Files Affected:
diff --git a/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp b/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
index 8dbf1b36a93b2..3d50a537e676b 100644
--- a/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
@@ -655,11 +655,14 @@ void CIRRecordLowering::lowerUnion() {
// locate the "most appropriate" storage type.
for (const FieldDecl *field : recordDecl->fields()) {
mlir::Type fieldType;
- if (field->isBitField())
- cirGenTypes.getCGModule().errorNYI(recordDecl->getSourceRange(),
- "bitfields in lowerUnion");
- else
+ if (field->isBitField()) {
+ if (field->isZeroLengthBitField())
+ continue;
+ fieldType = getBitfieldStorageType(field->getBitWidthValue());
+ setBitFieldInfo(field, CharUnits::Zero(), fieldType);
+ } else {
fieldType = getStorageType(field);
+ }
// This maps a field to its index. For unions, the index is always 0.
fieldIdxMap[field->getCanonicalDecl()] = 0;
diff --git a/clang/test/CIR/CodeGen/bitfield-union.c b/clang/test/CIR/CodeGen/bitfield-union.c
new file mode 100644
index 0000000000000..72e14c5fb71f3
--- /dev/null
+++ b/clang/test/CIR/CodeGen/bitfield-union.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s --check-prefix=CIR
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll
+// RUN: FileCheck --input-file=%t-cir.ll %s --check-prefix=LLVM
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll
+// RUN: FileCheck --input-file=%t.ll %s --check-prefix=OGCG
+
+typedef union {
+ int x;
+ int y : 4;
+ int z : 8;
+} demo;
+
+// CIR: !rec_demo = !cir.record<union "demo" {!s32i, !u8i, !u8i}>
+// LLVM: %union.demo = type { i32 }
+// OGCG: %union.demo = type { i32 }
+demo d;
+
+
|
bcardosolopes
approved these changes
Jun 23, 2025
andykaylor
approved these changes
Jun 23, 2025
| // CIR: !rec_demo = !cir.record<union "demo" {!s32i, !u8i, !u8i}> | ||
| // LLVM: %union.demo = type { i32 } | ||
| // OGCG: %union.demo = type { i32 } | ||
| demo d; |
There was a problem hiding this comment.
Can you add a test case with a zero-length bitfield? I'm not sure why anyone would put that in a union, but there's code for it so we should test it.
DrSergei
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Jun 24, 2025
This PR introduces support for bitfields inside unions in CIR.
anthonyhatran
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Jun 26, 2025
This PR introduces support for bitfields inside unions in CIR.
rlavaee
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Jul 1, 2025
This PR introduces support for bitfields inside unions in CIR.
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This PR introduces support for bitfields inside unions in CIR.