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Pull requests: verilog-to-routing/vtr-verilog-to-routing

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WIP: Implement inout support into ODIN II lang-cpp C/C++ code lang-hdl Hardware Description Language (Verilog/VHDL) lang-shell Shell scripts (bash etc.) Odin Odin II Logic Synthesis Tool: Unsorted item scripts Utility & Infrastructure scripts tests
#1292 opened May 1, 2020 by djns99 Loading…
2 of 6 tasks
Converter from rr_nodes to RRGraph object docs Documentation infra Project Infrastructure lang-cpp C/C++ code lang-python Python code libvtrutil scripts Utility & Infrastructure scripts tests VPR VPR FPGA Placement & Routing Tool VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1048 opened Nov 15, 2019 by tangxifan Loading…
2 of 7 tasks
Router exit condition lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool
#542 opened Apr 22, 2019 by rfungquicklogic Loading…
3 of 7 tasks
Display more helpful error message when parsing a BLIF file that cont… lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool
#340 opened May 6, 2018 by benreynwar Loading…
7 tasks
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