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Pull requests list

Display more helpful error message when parsing a BLIF file that cont… lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool
#340 opened May 6, 2018 by benreynwar Loading…
7 tasks
1
8
Router exit condition lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool
#542 opened Apr 22, 2019 by rfungquicklogic Loading…
3 of 7 tasks
3
Converter from rr_nodes to RRGraph object docs Documentation infra Project Infrastructure lang-cpp C/C++ code lang-python Python code libvtrutil scripts Utility & Infrastructure scripts tests VPR VPR FPGA Placement & Routing Tool VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1048 opened Nov 15, 2019 by tangxifan Loading…
2 of 7 tasks
39
WIP: Implement inout support into ODIN II lang-cpp C/C++ code lang-hdl Hardware Description Language (Verilog/VHDL) lang-shell Shell scripts (bash etc.) Odin Odin II Logic Synthesis Tool: Unsorted item scripts Utility & Infrastructure scripts tests
#1292 opened May 1, 2020 by djns99 Loading…
2 of 6 tasks
Enabled BLIF buffer elimination in preparation for InOuts lang-cpp C/C++ code Odin Odin II Logic Synthesis Tool: Unsorted item tests VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1520 opened Sep 1, 2020 by djns99 Loading…
1 of 4 tasks
@sdamghan
8
Allow router to report successful routing even if RCV fails to resolve hold lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool
#1540 opened Sep 13, 2020 by dpbaines Loading…
2 of 7 tasks
1
26
[WIP] Remove excess rr_graph_warnings VPR VPR FPGA Placement & Routing Tool
#1708 opened Apr 15, 2021 by sfkhalid Loading…
1
WIP: clang-tidy fixes around const std::string references. ABC ABC Logic Optimization & Technology Mapping Tool external_libs libarchfpga Library for handling FPGA Architecture descriptions libpugiutil libvtrutil Odin Odin II Logic Synthesis Tool: Unsorted item VPR VPR FPGA Placement & Routing Tool
#1764 opened Jun 3, 2021 by mithro Loading…
12
Fixed Fc values for designs with different horizontal and vertical channel widths VPR VPR FPGA Placement & Routing Tool
#1822 opened Aug 9, 2021 by bheiner14 Loading…
1 of 7 tasks
@jgoeders
12
VPR: interchange: add initial support for the interchange netlist frontend build Build system external_libs infra Project Infrastructure lang-make CMake/Make code libarchfpga Library for handling FPGA Architecture descriptions libvtrutil VPR VPR FPGA Placement & Routing Tool
#1894 opened Oct 25, 2021 by acomodi Loading…
3 of 7 tasks
Added Support for newer tbb lib versions external_libs VPR VPR FPGA Placement & Routing Tool
#1961 opened Jan 30, 2022 by choelzl Loading…
1 of 2 tasks
2
WIP: Edge switch subsets VPR VPR FPGA Placement & Routing Tool
#1990 opened Mar 4, 2022 by ethanroj23 Loading…
1
FPGA interchange: add RR graph generation external_libs libarchfpga Library for handling FPGA Architecture descriptions VPR VPR FPGA Placement & Routing Tool
#1999 opened Mar 16, 2022 by acomodi Loading…
1 of 7 tasks
27
doc: use symbiflow theme
#2006 opened Apr 12, 2022 by umarcor Loading…
2
doc: copy changelog to avoid warnings
#2009 opened Apr 12, 2022 by umarcor Loading…
4
WIP RRGraphView node_is_wire() Implementation VPR VPR FPGA Placement & Routing Tool
#2011 opened Apr 14, 2022 by ethanroj23 Loading…
2 of 7 tasks
XDC placement constraints support for interchange build Build system external_libs infra Project Infrastructure lang-make CMake/Make code lang-shell Shell scripts (bash etc.) libarchfpga Library for handling FPGA Architecture descriptions libvtrutil scripts Utility & Infrastructure scripts VPR VPR FPGA Placement & Routing Tool
#2021 opened May 5, 2022 by kboronski-ant Loading…
2 of 7 tasks
Do not make models with no pin-to-pin relations constant generators VPR VPR FPGA Placement & Routing Tool
#2058 opened Jun 9, 2022 by mkurc-ant Loading…
7 tasks
6
[WIP] Tileable Routing Resource Graph Builder build Build system docs Documentation external_libs infra Project Infrastructure lang-cpp C/C++ code lang-hdl Hardware Description Language (Verilog/VHDL) lang-make CMake/Make code lang-netlist lang-python Python code lang-shell Shell scripts (bash etc.) libarchfpga Library for handling FPGA Architecture descriptions liblog libpugiutil libvtrutil Odin Odin II Logic Synthesis Tool: Unsorted item Parmys scripts Utility & Infrastructure scripts VPR VPR FPGA Placement & Routing Tool
#2135 opened Aug 16, 2022 by tangxifan Loading…
7 of 19 tasks
Upgrade the Yosys+Odin-II Front-end Odin Odin II Logic Synthesis Tool: Unsorted item Yosys+Odin-II The Yosys+Odin-II synthesizer: the Yosys coarse-grained Tcl script and Odin-II partial mapping flow
#2148 opened Aug 29, 2022 by sdamghan Loading…
2 of 7 tasks
13
[WIP] Librrgraph unit test
#2150 opened Sep 1, 2022 by oscarcheng105 Loading…
7 tasks
1
Update Dockerfile infra Project Infrastructure
#2196 opened Nov 9, 2022 by KevinLi2596 Loading…
7 tasks
1
CVE-2007-4559 Patch external_libs
#2204 opened Nov 15, 2022 by TrellixVulnTeam Loading…
2
Add support for falling edge clocking external_libs libarchfpga Library for handling FPGA Architecture descriptions VPR VPR FPGA Placement & Routing Tool
#2211 opened Nov 23, 2022 by lpawelcz Loading…
1 of 7 tasks
64
Support route constraint. build Build system external_libs lang-make CMake/Make code libarchfpga Library for handling FPGA Architecture descriptions libvtrutil VPR VPR FPGA Placement & Routing Tool
#2233 opened Jan 26, 2023 by Tulong4Dev Loading…
2 of 7 tasks
19
ProTip! Updated in the last three days: updated:>2025-06-20.