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Pull requests list

Converter from rr_nodes to RRGraph object docs Documentation infra Project Infrastructure lang-cpp C/C++ code lang-python Python code libvtrutil scripts Utility & Infrastructure scripts tests VPR VPR FPGA Placement & Routing Tool VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1048 opened Nov 15, 2019 by tangxifan Loading… updated Feb 5, 2020
2 of 7 tasks
39
Allow router to report successful routing even if RCV fails to resolve hold lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool
#1540 opened Sep 13, 2020 by dpbaines Loading… updated Sep 22, 2020
2 of 7 tasks
1
26
[WIP] Remove excess rr_graph_warnings VPR VPR FPGA Placement & Routing Tool
#1708 opened Apr 15, 2021 by sfkhalid Loading… updated May 27, 2021
1
WIP: clang-tidy fixes around const std::string references. ABC ABC Logic Optimization & Technology Mapping Tool external_libs libarchfpga Library for handling FPGA Architecture descriptions libpugiutil libvtrutil Odin Odin II Logic Synthesis Tool: Unsorted item VPR VPR FPGA Placement & Routing Tool
#1764 opened Jun 3, 2021 by mithro Loading… updated Jun 17, 2021
12
Fixed Fc values for designs with different horizontal and vertical channel widths VPR VPR FPGA Placement & Routing Tool
#1822 opened Aug 9, 2021 by bheiner14 Loading… updated Oct 16, 2021
1 of 7 tasks
@jgoeders
12
VPR: interchange: add initial support for the interchange netlist frontend build Build system external_libs infra Project Infrastructure lang-make CMake/Make code libarchfpga Library for handling FPGA Architecture descriptions libvtrutil VPR VPR FPGA Placement & Routing Tool
#1894 opened Oct 25, 2021 by acomodi Loading… updated Oct 26, 2021
3 of 7 tasks
WIP: Edge switch subsets VPR VPR FPGA Placement & Routing Tool
#1990 opened Mar 4, 2022 by ethanroj23 Loading… updated Mar 16, 2022
1
WIP RRGraphView node_is_wire() Implementation VPR VPR FPGA Placement & Routing Tool
#2011 opened Apr 14, 2022 by ethanroj23 Loading… updated Apr 14, 2022
2 of 7 tasks
XDC placement constraints support for interchange build Build system external_libs infra Project Infrastructure lang-make CMake/Make code lang-shell Shell scripts (bash etc.) libarchfpga Library for handling FPGA Architecture descriptions libvtrutil scripts Utility & Infrastructure scripts VPR VPR FPGA Placement & Routing Tool
#2021 opened May 5, 2022 by kboronski-ant Loading… updated May 5, 2022
2 of 7 tasks
doc: use symbiflow theme
#2006 opened Apr 12, 2022 by umarcor Loading… updated Jul 31, 2022
2
doc: copy changelog to avoid warnings
#2009 opened Apr 12, 2022 by umarcor Loading… updated Jul 31, 2022
4
Do not make models with no pin-to-pin relations constant generators VPR VPR FPGA Placement & Routing Tool
#2058 opened Jun 9, 2022 by mkurc-ant Loading… updated Aug 15, 2022
7 tasks
6
FPGA interchange: add RR graph generation external_libs libarchfpga Library for handling FPGA Architecture descriptions VPR VPR FPGA Placement & Routing Tool
#1999 opened Mar 16, 2022 by acomodi Loading… updated Aug 15, 2022
1 of 7 tasks
27
Upgrade the Yosys+Odin-II Front-end Odin Odin II Logic Synthesis Tool: Unsorted item Yosys+Odin-II The Yosys+Odin-II synthesizer: the Yosys coarse-grained Tcl script and Odin-II partial mapping flow
#2148 opened Aug 29, 2022 by sdamghan Loading… updated Oct 5, 2022
2 of 7 tasks
13
Added Support for newer tbb lib versions external_libs VPR VPR FPGA Placement & Routing Tool
#1961 opened Jan 30, 2022 by choelzl Loading… updated Nov 18, 2022
1 of 2 tasks
2
Add support for falling edge clocking external_libs libarchfpga Library for handling FPGA Architecture descriptions VPR VPR FPGA Placement & Routing Tool
#2211 opened Nov 23, 2022 by lpawelcz Loading… updated Dec 23, 2022
1 of 7 tasks
64
Enabled BLIF buffer elimination in preparation for InOuts lang-cpp C/C++ code Odin Odin II Logic Synthesis Tool: Unsorted item tests VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1520 opened Sep 1, 2020 by djns99 Loading… updated Jan 24, 2023
1 of 4 tasks
@sdamghan
8
WIP: Implement inout support into ODIN II lang-cpp C/C++ code lang-hdl Hardware Description Language (Verilog/VHDL) lang-shell Shell scripts (bash etc.) Odin Odin II Logic Synthesis Tool: Unsorted item scripts Utility & Infrastructure scripts tests
#1292 opened May 1, 2020 by djns99 Loading… updated Jan 24, 2023
2 of 6 tasks
Update Dockerfile infra Project Infrastructure
#2196 opened Nov 9, 2022 by KevinLi2596 Loading… updated Apr 27, 2023
7 tasks
1
CVE-2007-4559 Patch external_libs
#2204 opened Nov 15, 2022 by TrellixVulnTeam Loading… updated Apr 27, 2023
2
Support route constraint. build Build system external_libs lang-make CMake/Make code libarchfpga Library for handling FPGA Architecture descriptions libvtrutil VPR VPR FPGA Placement & Routing Tool
#2233 opened Jan 26, 2023 by Tulong4Dev Loading… updated Aug 2, 2023
2 of 7 tasks
19
add top module and search path for parmys
#2365 opened Aug 10, 2023 by huoshenlaile Loading… updated Aug 10, 2023
4 of 7 tasks
Openfpga VPR VPR FPGA Placement & Routing Tool
#2382 opened Aug 31, 2023 by behnam-rs Loading… updated Aug 31, 2023
2 of 7 tasks
Adding Number of Logic levels and number of timing graph levels to ti… external_libs VPR VPR FPGA Placement & Routing Tool
#2383 opened Aug 31, 2023 by behnam-rs Loading… updated Aug 31, 2023
2 of 7 tasks
Partition based packer VPR VPR FPGA Placement & Routing Tool
#2385 opened Aug 31, 2023 by behnam-rs Loading… updated Aug 31, 2023
2 of 7 tasks
1
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