-
Notifications
You must be signed in to change notification settings - Fork 44
/
Copy pathcompv_math_convlt.cxx
executable file
·340 lines (305 loc) · 30.1 KB
/
compv_math_convlt.cxx
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
/* Copyright (C) 2011-2020 Doubango Telecom <https://www.doubango.org>
* File author: Mamadou DIOP (Doubango Telecom, France).
* License: GPLv3. For commercial license please contact us.
* Source code: https://github.com/DoubangoTelecom/compv
* WebSite: http://compv.org
*/
#include "compv/base/math/compv_math_convlt.h"
#include "compv/base/compv_cpu.h"
#include "compv/base/math/intrin/x86/compv_math_convlt_intrin_avx2.h"
#include "compv/base/math/intrin/x86/compv_math_convlt_intrin_sse2.h"
#include "compv/base/math/intrin/arm/compv_math_convlt_intrin_neon.h"
COMPV_NAMESPACE_BEGIN()
// X86 (deprecated)
#if COMPV_ASM && COMPV_ARCH_X86 && 0 // x86_32 asm deprecated
COMPV_EXTERNC void CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_X86_SSE2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_X86_AVX2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_X86_SSE2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_X86_AVX2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_X86_FMA3_AVX2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u16s16s_Asm_X86_SSE2(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u16s16s_Asm_X86_AVX2(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_16s16s16s_Asm_X86_SSE2(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_16s16s16s_Asm_X86_AVX2(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
#endif /* X86 */
// X64
#if COMPV_ASM && COMPV_ARCH_X64
COMPV_EXTERNC void CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_X64_SSE2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_X64_AVX2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_X64_SSE2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_X64_AVX2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_X64_FMA3_AVX2(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_X64_SSE2(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_X64_AVX2(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_X64_FMA3_AVX2(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_X64_SSE2(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_X64_AVX2(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_X64_FMA3_AVX2(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_X64_SSE2(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_X64_AVX2(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_X64_FMA3_AVX2(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u16s16s_Asm_X64_SSE41(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u16s16s_Asm_X64_AVX2(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_16s16s16s_Asm_X64_SSE41(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_16s16s16s_Asm_X64_AVX2(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
#endif /* X64 */
// ARM32
#if COMPV_ASM && COMPV_ARCH_ARM32
COMPV_EXTERNC void CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_NEON32(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_NEON32(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_FMA_NEON32(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_NEON32(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_FMA_NEON32(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_NEON32(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_FMA_NEON32(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_NEON32(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_FMA_NEON32(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u16s16s_Asm_NEON32(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_16s16s16s_Asm_NEON32(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
#endif /* ARM32 */
// ARM64
#if COMPV_ASM && COMPV_ARCH_ARM64
COMPV_EXTERNC void CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_NEON64(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_NEON64(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f8u_Asm_FMA_NEON64(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_NEON64(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u32f32f_Asm_FMA_NEON64(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_NEON64(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f32f_Asm_FMA_NEON64(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_NEON64(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_32f32f8u_Asm_FMA_NEON64(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_8u16s16s_Asm_NEON64(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
COMPV_EXTERNC void CompVMathConvlt1VtHz_16s16s16s_Asm_NEON64(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize);
#endif /* ARM64 */
// InputType = uint8_t, KernelType = int16_t, OutputType = uint8_t, FixedPoint = true
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_true(const uint8_t* inPtr, uint8_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const uint16_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHzFixedPoint_8u16u8u)(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const uint16_t* vthzKernPtr, compv_uscalar_t kernSize) {
COMPV_CHECK_CODE_NOP(CompVMathConvlt::convlt1VtHzFixedPoint_C(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize));
};
#if COMPV_ARCH_X86
if (CompVCpu::isEnabled(kCpuFlagSSE2) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Intrin_SSE2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_X64_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_X64_AVX2);
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHzFixedPoint_8u16u8u = CompVMathConvlt1VtHzFixedPoint_8u16u8u_Asm_NEON64);
}
#endif
CompVMathConvlt1VtHzFixedPoint_8u16u8u(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
// InputType = uint8_t, KernelType = compv_float32_t, OutputType = uint8_t, FixedPoint = false
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_false(const uint8_t* inPtr, uint8_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const compv_float32_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHz_8u32f8u)(const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const uint8_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
{
COMPV_CHECK_CODE_NOP((CompVMathConvlt::convlt1VtHzKernelFloat_C<uint8_t, compv_float32_t, uint8_t>(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize)));
};
#if COMPV_ARCH_X86
if (CompVCpu::isEnabled(kCpuFlagSSE2) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Intrin_SSE2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_X64_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_X64_AVX2);
if (CompVCpu::isEnabled(kCpuFlagFMA3)) {
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_X64_FMA3_AVX2);
}
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_NEON64);
if (CompVCpu::isEnabled(kCpuFlagARM_NEON_FMA)) {
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_FMA_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_8u32f8u = CompVMathConvlt1VtHz_8u32f8u_Asm_FMA_NEON64);
}
}
#endif
CompVMathConvlt1VtHz_8u32f8u(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
// InputType = uint8_t, KernelType = compv_float32_t, OutputType = compv_float32_t, FixedPoint = false
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_false(const uint8_t* inPtr, compv_float32_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const compv_float32_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHz_8u32f32f)(const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const uint8_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
{
COMPV_CHECK_CODE_NOP((CompVMathConvlt::convlt1VtHzKernelFloat_C<uint8_t, compv_float32_t, compv_float32_t>(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize)));
};
#if COMPV_ARCH_X86
if (CompVCpu::isEnabled(kCpuFlagSSE2) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Intrin_SSE2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_X64_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_X64_AVX2);
if (CompVCpu::isEnabled(kCpuFlagFMA3)) {
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_X64_FMA3_AVX2);
}
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_NEON64);
if (CompVCpu::isEnabled(kCpuFlagARM_NEON_FMA)) {
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_FMA_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_8u32f32f = CompVMathConvlt1VtHz_8u32f32f_Asm_FMA_NEON64);
}
}
#endif
CompVMathConvlt1VtHz_8u32f32f(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
// InputType = compv_float32_t, KernelType = compv_float32_t, OutputType = compv_float32_t, FixedPoint = false
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_false(const compv_float32_t* inPtr, compv_float32_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const compv_float32_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHz_32f32f32f)(const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const compv_float32_t* inPtr, compv_float32_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
{
COMPV_CHECK_CODE_NOP((CompVMathConvlt::convlt1VtHzKernelFloat_C<compv_float32_t, compv_float32_t, compv_float32_t>(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize)));
};
#if COMPV_ARCH_X86
if (CompVCpu::isEnabled(kCpuFlagSSE2) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Intrin_SSE2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_X64_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_X64_AVX2);
if (CompVCpu::isEnabled(kCpuFlagFMA3)) {
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_X64_FMA3_AVX2);
}
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_NEON64);
if (CompVCpu::isEnabled(kCpuFlagARM_NEON_FMA)) {
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_FMA_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_32f32f32f = CompVMathConvlt1VtHz_32f32f32f_Asm_FMA_NEON64);
}
}
#endif
CompVMathConvlt1VtHz_32f32f32f(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
// InputType = compv_float32_t, KernelType = compv_float32_t, OutputType = uint8_t, FixedPoint = false
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_false(const compv_float32_t* inPtr, uint8_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const compv_float32_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHz_32f32f8u)(const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const compv_float32_t* inPtr, uint8_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const compv_float32_t* vthzKernPtr, compv_uscalar_t kernSize)
{
COMPV_CHECK_CODE_NOP((CompVMathConvlt::convlt1VtHzKernelFloat_C<compv_float32_t, compv_float32_t, uint8_t>(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize)));
};
#if COMPV_ARCH_X86
if (CompVCpu::isEnabled(kCpuFlagSSE2) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Intrin_SSE2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_X64_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_X64_AVX2);
if (CompVCpu::isEnabled(kCpuFlagFMA3)) {
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_X64_FMA3_AVX2);
}
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_NEON64);
if (CompVCpu::isEnabled(kCpuFlagARM_NEON_FMA)) {
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_FMA_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_32f32f8u = CompVMathConvlt1VtHz_32f32f8u_Asm_FMA_NEON64);
}
}
#endif
CompVMathConvlt1VtHz_32f32f8u(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
// InputType = uint8_t, KernelType = int16_t, OutputType = int16_t, FixedPoint = false
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_false(const uint8_t* inPtr, int16_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const int16_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHz_8u16s16s)(const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const uint8_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize)
{
COMPV_CHECK_CODE_NOP((CompVMathConvlt::convlt1VtHzKernelInt_C<uint8_t, int16_t, int16_t>(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize)));
};
#if COMPV_ARCH_X86
if (width >= 16) {
if (CompVCpu::isEnabled(kCpuFlagSSE2)) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Intrin_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagSSE41)) {
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Asm_X64_SSE41);
}
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Asm_X64_AVX2);
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_8u16s16s = CompVMathConvlt1VtHz_8u16s16s_Asm_NEON64);
}
#endif
CompVMathConvlt1VtHz_8u16s16s(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
// InputType = int16_t, KernelType = int16_t, OutputType = int16_t, FixedPoint = false
template<> COMPV_BASE_API
COMPV_ERROR_CODE CompVMathConvlt::convlt1VtHz_private_fxp_false(const int16_t* inPtr, int16_t* outPtr, size_t width, size_t height, size_t step, size_t pad, const int16_t* vthzKernPtr, size_t kernSize)
{
void(*CompVMathConvlt1VtHz_16s16s16s)(const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize)
= [](const int16_t* inPtr, int16_t* outPtr, compv_uscalar_t width, compv_uscalar_t height, compv_uscalar_t step, compv_uscalar_t pad, const int16_t* vthzKernPtr, compv_uscalar_t kernSize)
{
COMPV_CHECK_CODE_NOP((CompVMathConvlt::convlt1VtHzKernelInt_C<int16_t, int16_t, int16_t>(inPtr, outPtr, width, height, step, pad, vthzKernPtr, kernSize)));
};
#if COMPV_ARCH_X86
if (width >= 16) {
if (CompVCpu::isEnabled(kCpuFlagSSE2)) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Intrin_SSE2);
}
if (CompVCpu::isEnabled(kCpuFlagSSE41)) {
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Asm_X64_SSE41);
}
}
if (CompVCpu::isEnabled(kCpuFlagAVX2) && width >= 32) {
COMPV_EXEC_IFDEF_INTRIN_X86(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Intrin_AVX2);
COMPV_EXEC_IFDEF_ASM_X64(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Asm_X64_AVX2);
}
#elif COMPV_ARCH_ARM
if (CompVCpu::isEnabled(kCpuFlagARM_NEON) && width >= 16) {
COMPV_EXEC_IFDEF_INTRIN_ARM(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Intrin_NEON);
COMPV_EXEC_IFDEF_ASM_ARM32(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Asm_NEON32);
COMPV_EXEC_IFDEF_ASM_ARM64(CompVMathConvlt1VtHz_16s16s16s = CompVMathConvlt1VtHz_16s16s16s_Asm_NEON64);
}
#endif
CompVMathConvlt1VtHz_16s16s16s(inPtr, outPtr, static_cast<compv_uscalar_t>(width), static_cast<compv_uscalar_t>(height), static_cast<compv_uscalar_t>(step), static_cast<compv_uscalar_t>(pad), vthzKernPtr, static_cast<compv_uscalar_t>(kernSize));
return COMPV_ERROR_CODE_S_OK;
}
COMPV_NAMESPACE_END()