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3 | 3 |
|
4 | 4 | :::warning Warning
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5 | 5 |
|
6 |
| -When the PPU is drawing the screen it is directly reading |
7 |
| -from Video Memory (VRAM) and from the Object Attribute Memory (OAM). |
8 |
| -During these periods the Game Boy CPU may not access VRAM and OAM. |
9 |
| -That means that any attempts to write to VRAM or OAM are ignored (data |
10 |
| -remains unchanged). And any attempts to read from VRAM or OAM will return |
11 |
| -undefined data (typically $FF). |
12 |
| - |
13 |
| -For this reason the program should verify if VRAM/OAM is accessible |
14 |
| -before actually reading or writing to it. This is usually done by |
15 |
| -reading the Mode bits from the STAT Register (FF41). When doing this (as |
16 |
| -described in the examples below) you should take care that no interrupts |
17 |
| -occur between the wait loops and the following memory access - the |
18 |
| -memory is guaranteed to be accessible only for a few cycles just |
19 |
| -after the wait loops have completed. |
| 6 | +When the PPU is [drawing the screen](<#Rendering overview>), it is often directly reading from Video Memory (VRAM) and from the Object Attribute Memory (OAM). |
| 7 | +During these periods, the Game Boy CPU cannot access VRAM and OAM. |
| 8 | + |
| 9 | +That means that any attempts to write to VRAM or OAM are ignored (data remains unchanged). |
| 10 | +And any attempts to read from VRAM or OAM will return undefined data (typically $FF). |
| 11 | + |
| 12 | +For this reason the program should verify if VRAM/OAM is accessible before actually reading or writing to it. |
| 13 | +This is usually done by reading the Mode bits from [the STAT Register](<#FF41 — STAT: LCD status>). |
| 14 | +When doing this (as described in the examples below) you should take care that **no interrupts occur between the wait loops and the following memory access**; |
| 15 | +the memory is guaranteed to be accessible only for a few cycles (less than Mode 2's length) just after a wait loop exits. |
20 | 16 |
|
21 | 17 | :::
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22 | 18 |
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@@ -66,8 +62,7 @@ During those modes, OAM can be accessed directly or by doing a DMA
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66 | 62 | transfer (FF46). Outside those modes, DMA out-prioritizes the PPU in
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67 | 63 | accessing OAM, and the PPU will read $FF from OAM during that time.
|
68 | 64 |
|
69 |
| -A typical |
70 |
| -procedure that waits for accessibility of OAM would be: |
| 65 | +A typical procedure that waits for accessibility of OAM would be: |
71 | 66 |
|
72 | 67 | ```rgbasm
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73 | 68 | ld hl, $FF41 ; STAT Register
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|
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