hdl
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🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
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Jun 8, 2025 - VHDL
A modern hardware definition language and toolchain based on Python
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May 15, 2025 - Python
HDL libraries and projects
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Jun 6, 2025 - Verilog
Hardware Description Languages
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Feb 7, 2025
Veryl: A Modern Hardware Description Language
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Jun 7, 2025 - Rust
A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
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Jan 8, 2022 - Python
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。
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Sep 15, 2023 - Bluespec
The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
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Mar 17, 2025 - Dart
Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
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May 4, 2025 - Python
Open source machine learning accelerators
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Mar 24, 2024 - Scala
PlutoSDR Firmware
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Oct 15, 2024 - Shell
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
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Apr 30, 2024 - Verilog
Test suite designed to check compliance with the SystemVerilog standard.
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Jun 6, 2025 - SystemVerilog
Reviewing some online CS courses I took
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Mar 10, 2025 - JavaScript
VeloView performs real-time visualization and easy processing of live captured 3D LiDAR data from Velodyne sensors (Alpha Prime™, Puck™, Ultra Puck™, Puck Hi-Res™, Alpha Puck™, Puck LITE™, HDL-32, HDL-64E). Runs on Windows, Linux and MacOS. This repository is a mirror of https://gitlab.kitware.com/LidarView/VeloView-Velodyne.
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Sep 29, 2021 - C++
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