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[v6] Memory_* #3061

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chschlue opened this issue Sep 19, 2020 · 2 comments
Open
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[v6] Memory_* #3061

chschlue opened this issue Sep 19, 2020 · 2 comments
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v6-medium
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6.0.0

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@chschlue
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chschlue commented Sep 19, 2020 •
edited by cpresser

  • Commonalize SPI Flashes
@chschlue chschlue added this to the 6.0.0 milestone Sep 19, 2020
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Is there a use-case where people actually connect a SPI flash in daisy-chain configuration?
I am not aware of one, so I think it is a good idea to put all ports on the same side.
Perhaps like so
image

Here are some of the current AT25 style flashes. All look different:
image
image
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image
image

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Your example looks good to me.
Daisy chaining in conjunction with large reads doesn't make sense to me.

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