Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

VHDL package documentation not being generated like entities #595

Open
james-ziegler opened this issue Apr 1, 2024 · 0 comments
Open

VHDL package documentation not being generated like entities #595

james-ziegler opened this issue Apr 1, 2024 · 0 comments
Labels
bug Something isn't working documenter

Comments

@james-ziegler
Copy link

Describe the bug
When adding comments to describe a file, if there is a package the documentation is not generating like entities do. For the file shown below, no description is generated, and the @Keywords are not used like they are in a file containing an entity.

To Reproduce
Code

{
--! @title sample package
--! @author James Ziegler
--! @date 4/1/2024
--! @brief Sample package to demonstrate issues
--!
--! This is just a sample

library ieee;
  use ieee.std_logic_1164.all;
 package sample_package is
}

--! Sample record type
type sample_record is record
single_bit : std_logic; --! Can this be used for a description of the element?
byte_data : std_logic_vector (7 downto 0); --! this element is a single byte of data
end record sample_record;

end package sample_package;

Please complete the following information:

  • OS: Windows 10
  • VSCode version version 1.87.2
  • TerosHDL version 5.0.12

Screenshots

package

Additional context
Some other packages will generate a partial description, but the @Keywords are not recognized and are displayed as part of the description.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
bug Something isn't working documenter
Projects
None yet
Development

No branches or pull requests

2 participants