Help simulating pass transistor logic

[MikeHaydell]

Hello,
I am trying to simulate the attached rising edge triggered D flip flop, but Logisim detects oscillations upon clocking. I know it's supposed to oscillate to store the value, but other logic gate level flip flops seem more stable. Is there anything I can do to overcome this issue or is it not possible with Logisim? Thank you in advance:)

Note: The NAND gates seem required for setting an initial value of 0, using only NOTs causes errors, I guess since it doesn't get an initial value to pass. Digital can handle Flip Flops of this type (with or without NAND gates) but Digital is much more difficult to work with and isn't as conducive to troubleshooting as is Logisim (in my opinion).

[BFH-ktt1]

@MikeHaydell : Unfortunately the simulation engine of logisim is not "perfect" and has some limitations. One of these limitations is the simulation of the circuit you show above (this was also one of the reasons that Carl Burch started Toves, and that Digital was developped). Hence unfortunately you cannot overcome this problem.

[MikeHaydell]

Thank you for the quick reply! At least now I know.