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Add AXI stream routing?! #871

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stnolting opened this issue Apr 6, 2024 · 0 comments · Fixed by #908
Closed

Add AXI stream routing?! #871

stnolting opened this issue Apr 6, 2024 · 0 comments · Fixed by #908
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help wanted Extra attention is needed

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@stnolting
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I would like to add some "identifier" to the processor's (AXI) stream ports. Something like a source ID and a destination ID so we can talk with several data sinks/sources while still only having two physical stream channels.

I scrolled through the AXI-stream specs and I found the tid and tdest signals. However, I don not really understand them 😅

tid seems to represent some package ID or even a source ID while tdest provides a some destination routing data. Is tdest only used for interconnect-internal routing and thus, is not available on the sink side? What about tid? Is that hard-coded on the host side (just indicating the "port number")?

Maybe anyone can help me out here. 🤔

@stnolting stnolting added the help wanted Extra attention is needed label Apr 6, 2024
@stnolting stnolting linked a pull request May 21, 2024 that will close this issue
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