system-on-chip
Here are 74 public repositories matching this topic...
HTTP request/response parser in C tuned for low-profile MCUs like Arduino
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Dec 9, 2020 - C
Attempt at building entirely from scratch a RISC-V SoC for self-education purposes.
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Jul 15, 2023 - SystemVerilog
openbmc Baseboard Management Controller
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Aug 17, 2021
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Oct 19, 2021
Convolutional Neural Networks for Verilog High-Level Synthesis
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Oct 19, 2018
An FPGA-based RISC-V SoC to mess around with
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May 12, 2021 - Verilog
COM 5242 Introduction to SoC and its Applications 2022 Course Materials
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Feb 12, 2023
System-Verilog implementation of the ACDMA crossbar
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Nov 25, 2018 - SystemVerilog
This is an ongoing rewrite of https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/SocExplorer
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Jun 13, 2018 - C++
SideLine is a software-based power side-channel analysis vector. It uses delay-lines (located in SoC memory controllers) as power meters.
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Nov 24, 2020 - HTML
Chisel implementation of Neural Processing Unit for System on the Chip
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Apr 6, 2024 - Scala
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Dec 14, 2018
The goal of ECE 385 course is to teach students to design, build, and test/debug a digital system, which can be a 16-bit microprocessor, a dedicated logic core, or a system-on-a-chip (SoC) platform
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May 28, 2024 - Verilog
Non-intrusive packet delivery monitoring service for Networks-on-Chip (NoCs) focusing on real-time systems. Hardware verification and development in C++/SystemC using the Visual Studio 2017 IDE.
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Jun 9, 2021 - C++
Examples of using Litex on an Alchitry Cu board
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Feb 4, 2024 - Python
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