-
Notifications
You must be signed in to change notification settings - Fork 136
/
ARM.CMSIS-FreeRTOS.pdsc
1526 lines (1369 loc) · 81 KB
/
ARM.CMSIS-FreeRTOS.pdsc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
<?xml version="1.0" encoding="utf-8"?>
<package schemaVersion="1.4" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
<vendor>ARM</vendor>
<name>CMSIS-FreeRTOS</name>
<description>Bundle of FreeRTOS for Cortex-M and Cortex-A</description>
<url>http://www.keil.com/pack/</url>
<license>License/license.txt</license>
<releases>
<release version="10.4.6" date="2021-11-16">
FreeRTOS 10.4.3
Updates and bugfixes:
- Updated osSemaphoreGetCount to use uxSemaphoreGetCountFromISR instead of uxQueueMessagesWaitingFromISR
- Correct typecasting of argument usStackDepth for xTaskCreate in function osThreadNew (#51)
- Fix mutex allocation for Arm Standard C library and allow it only when the kernel is running
</release>
<release version="10.4.3" date="2021-09-28">
FreeRTOS 10.4.3
Updates and bugfixes:
- Corrected timeout handling in osThreadFlagsWait (#50)
- Enable full static memory allocation for timer object (#48)
- Fix vQueueAddToRegistry function call issue when arguments are NULL (#49)
- Added workaround for xEventGroupClearBitsFromISR no yield problem
- Added FreeRTOS kernel state check to osKernelInitialize and osKernelState
- Make source code more verbose with documented limitations (#41)
- Fix osMemoryPoolNew expression use (#42)
</release>
<release version="10.3.1" date="2020-04-30">
FreeRTOS 10.3.1
Maintenance for CMSIS 5.7.0:
- Enhanced kernel configuration handling and checking when using CMSIS-RTOS2 API
- Added CMSIS-RTOS2 Blinky example for IAR using EWARM simulator
- Modified pack description to avoid component identification issues
</release>
<release version="10.3.0" date="2019-12-04">
FreeRTOS 10.2.1
Maintenance for CMSIS 5.4.0:
- Added osMemoryPool functions using FreeRTOS
- Corrected osEventFlagsWait flag comparison when using osFlagsWaitAll
- Corrected osThreadGetStackSpace return value (bytes instead of words)
- Removed Cortex-A examples (available in device specific packs)
</release>
<release version="10.2.0" date="2019-04-12">
FreeRTOS 10.2.0
Maintenance for CMSIS 5.4.0:
- Updated to CMSIS RTOS2 API 2.1.3
- Updated Arm standard C library interface
- Added configuration for the Event Recorder
- Added TrustZone example for Armv8M using RTOS2 API
- Enhanced FreeRTOS component viewer
- Corrected osDelayUntil execution duration
- Corrected SysTick_Handler execution when kernel is not started
- Corrected critical section for osKernelGetSysTimerCount
</release>
<release version="10.0.1" date="2018-02-20">
FreeRTOS 10.0.0
Maintenance for CMSIS 5.3.0:
- Added queue registry support to CMSIS:RTOS2:FreeRTOS component.
- Updated CMSIS-FreeRTOS component view to display queue, mutex and semaphore objects.
- Updated to CMSIS RTOS2 API 2.1.2 and OS Tick API 1.0.1.
- Fixed context switch response latency for API calls from ISR.
</release>
<release version="9.1.0" date="2017-08-11">
FreeRTOS 9.0.0
Maintenance release for CMSIS 5.1.0:
- Added support for ARM Compiler 6
- Updated Cortex-A example to use IRQ Controller component
- Corrected stack size allocation in RTOS2 osThreadNew function
- Added support for OS Tick component
- Added documentation for configuration options (native/CMSIS-RTOS2)
- Debug event TaskIncrementTick level set to Detail
</release>
<release version="9.0.0" date="2017-03-13">
Initial release version:
- native FreeRTOS component (RTOS: Variant=FreeRTOS)
- CMSIS-RTOS FreeRTOS for Cortex-M and Cortex-A9 (CMSIS:RTOS:FreeRTOS, CMSIS:RTOS2:FreeRTOS)
</release>
</releases>
<requirements>
<packages>
<package vendor="ARM" name="CMSIS" version="5.4.0-0"/>
</packages>
</requirements>
<conditions>
<condition id="ARMCC6">
<accept Tcompiler="ARMCC" Toptions="AC6"/>
<accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
</condition>
<condition id="ARMCC">
<require Tcompiler="ARMCC" Toptions="AC5"/>
</condition>
<condition id="GCC">
<require Tcompiler="GCC"/>
</condition>
<condition id="IAR">
<require Tcompiler="IAR"/>
</condition>
<condition id="CM0">
<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
<accept Dcore="Cortex-M0"/>
<accept Dcore="Cortex-M0+"/>
<accept Dcore="SC000"/>
</condition>
<condition id="CM3">
<description>Cortex-M3 or SC300 processor based device</description>
<accept Dcore="Cortex-M3"/>
<accept Dcore="SC300"/>
</condition>
<condition id="CM4">
<description>Cortex-M4 processor based device</description>
<require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
</condition>
<condition id="CM4_FP">
<description>Cortex-M4 processor based device using Floating Point Unit</description>
<require Dcore="Cortex-M4" Dfpu="FPU"/>
</condition>
<condition id="CM7">
<description>Cortex-M7 processor based device</description>
<require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
</condition>
<condition id="CM7_FP">
<description>Cortex-M7 processor based device using Floating Point Unit</description>
<accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
<accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
</condition>
<condition id="CM7_SP">
<description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
<require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
</condition>
<condition id="CM7_DP">
<description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
<require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
</condition>
<condition id="CM23">
<description>Cortex-M23 processor based device</description>
<require Dcore="Cortex-M23"/>
</condition>
<condition id="CM23_NoTZ">
<description>Cortex-M23 processor based device without TrustZone</description>
<require condition="CM23"/>
<require Dtz="NO_TZ"/>
</condition>
<condition id="CM23_TZ">
<description>Cortex-M23 processor based device with TrustZone</description>
<require condition="CM23"/>
<require Dtz="TZ"/>
</condition>
<condition id="CM33">
<description>Cortex-M33 processor based device</description>
<accept Dcore="Cortex-M33"/>
</condition>
<condition id="CM33_NoTZ">
<description>Cortex-M33 processor based device without TrustZone</description>
<require condition="CM33"/>
<require Dtz="NO_TZ"/>
</condition>
<condition id="CM33_TZ">
<description>Cortex-M33 processor based device with TrustZone</description>
<require condition="CM33"/>
<require Dtz="TZ"/>
</condition>
<condition id="CM55">
<description>Cortex-M55 processor based device</description>
<accept Dcore="Cortex-M55"/>
</condition>
<condition id="CM55_NoTZ">
<description>Cortex-M55 processor based device without TrustZone</description>
<require condition="CM55"/>
<require Dtz="NO_TZ"/>
</condition>
<condition id="CM55_TZ">
<description>Cortex-M55 processor based device with TrustZone</description>
<require condition="CM55"/>
<require Dtz="TZ"/>
</condition>
<condition id="CA9_DP">
<description>Cortex-A9 processor based device using Floating Point Unit (DP)</description>
<require Dcore="Cortex-A9" Dfpu="DP_FPU"/>
</condition>
<condition id="CoreM">
<description>Cortex-M processor based device</description>
<accept condition="CM0"/>
<accept condition="CM3"/>
<accept condition="CM4"/>
<accept condition="CM4_FP"/>
<accept condition="CM7"/>
<accept condition="CM7_FP"/>
<accept condition="CM23"/>
<accept condition="CM33"/>
<accept condition="CM55"/>
</condition>
<condition id="CoreA">
<description>Cortex-A processor based device</description>
<accept condition="CA9_DP"/>
</condition>
<!-- ARMCC compiler -->
<condition id="CM0_ARMCC">
<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler 5</description>
<require condition="CM0"/>
<require condition="ARMCC"/>
</condition>
<condition id="CM3_ARMCC">
<description>Cortex-M3 or SC300 processor based device for the ARM Compiler 5</description>
<require condition="CM3"/>
<require condition="ARMCC"/>
</condition>
<condition id="CM4_ARMCC">
<description>Cortex-M4 processor based device for the ARM Compiler 5</description>
<require condition="CM4"/>
<require condition="ARMCC"/>
</condition>
<condition id="CM4_FP_ARMCC">
<description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler 5</description>
<require condition="CM4_FP"/>
<require condition="ARMCC"/>
</condition>
<condition id="CM7_ARMCC">
<description>Cortex-M7 processor based device for the ARM Compiler 5</description>
<require condition="CM7"/>
<require condition="ARMCC"/>
</condition>
<condition id="CM7_SP_ARMCC">
<description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler 5</description>
<require condition="CM7_SP"/>
<require condition="ARMCC"/>
</condition>
<condition id="CM7_DP_ARMCC">
<description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler 5</description>
<require condition="CM7_DP"/>
<require condition="ARMCC"/>
</condition>
<condition id="CA9_DP_ARMCC">
<description>Cortex-A9 processor based device using Floating Point Unit (DP) for the ARM Compiler 5</description>
<require condition="CA9_DP"/>
<require condition="ARMCC"/>
</condition>
<!-- ARMCC6 compiler -->
<condition id="CM0_ARMCC6">
<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler 6</description>
<require condition="CM0"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM3_ARMCC6">
<description>Cortex-M3 or SC300 processor based device for the ARM Compiler 6</description>
<require condition="CM3"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM4_ARMCC6">
<description>Cortex-M4 processor based device for the ARM Compiler 6</description>
<require condition="CM4"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM4_FP_ARMCC6">
<description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler 6</description>
<require condition="CM4_FP"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM7_ARMCC6">
<description>Cortex-M7 processor based device for the ARM Compiler 6</description>
<require condition="CM7"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM7_SP_ARMCC6">
<description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler 6</description>
<require condition="CM7_SP"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM7_DP_ARMCC6">
<description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler 6</description>
<require condition="CM7_DP"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM23_ARMCC6">
<description>Cortex-M23 processor based device for the ARM Compiler 6</description>
<require condition="CM23"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM23_NoTZ_ARMCC6">
<description>Cortex-M23 processor based device without TrustZone for the ARM Compiler 6</description>
<require condition="CM23_NoTZ"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM23_TZ_ARMCC6">
<description>Cortex-M23 processor based device with TrustZone for the ARM Compiler 6</description>
<require condition="CM23_TZ"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM33_ARMCC6">
<description>Cortex-M33 processor based device for the ARM Compiler 6</description>
<require condition="CM33"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM33_NoTZ_ARMCC6">
<description>Cortex-M33 processor based device without TrustZone for the ARM Compiler 6</description>
<require condition="CM33_NoTZ"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM33_TZ_ARMCC6">
<description>Cortex-M33 processor based device with TrustZone for the ARM Compiler 6</description>
<require condition="CM33_TZ"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM55_ARMCC6">
<description>Cortex-M55 processor based device for the ARM Compiler 6</description>
<require condition="CM55"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM55_NoTZ_ARMCC6">
<description>Cortex-M55 processor based device without TrustZone for the ARM Compiler 6</description>
<require condition="CM55_NoTZ"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CM55_TZ_ARMCC6">
<description>Cortex-M55 processor based device with TrustZone for the ARM Compiler 6</description>
<require condition="CM55_TZ"/>
<require condition="ARMCC6"/>
</condition>
<condition id="CA9_DP_ARMCC6">
<description>Cortex-A9 processor based device using Floating Point Unit (DP) for the ARM Compiler 6</description>
<require condition="CA9_DP"/>
<require condition="ARMCC6"/>
</condition>
<!-- GCC compiler -->
<condition id="CM0_GCC">
<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
<require condition="CM0"/>
<require condition="GCC"/>
</condition>
<condition id="CM3_GCC">
<description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
<require condition="CM3"/>
<require condition="GCC"/>
</condition>
<condition id="CM4_GCC">
<description>Cortex-M4 processor based device for the GCC Compiler</description>
<require condition="CM4"/>
<require condition="GCC"/>
</condition>
<condition id="CM4_FP_GCC">
<description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
<require condition="CM4_FP"/>
<require condition="GCC"/>
</condition>
<condition id="CM7_GCC">
<description>Cortex-M7 processor based device for the GCC Compiler</description>
<require condition="CM7"/>
<require condition="GCC"/>
</condition>
<condition id="CM7_SP_GCC">
<description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
<require condition="CM7_SP"/>
<require condition="GCC"/>
</condition>
<condition id="CM7_DP_GCC">
<description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
<require condition="CM7_DP"/>
<require condition="GCC"/>
</condition>
<condition id="CM23_GCC">
<description>Cortex-M23 processor based device for the GCC Compiler</description>
<require condition="CM23"/>
<require condition="GCC"/>
</condition>
<condition id="CM23_NoTZ_GCC">
<description>Cortex-M23 processor based device without TrustZone for the GCC Compiler</description>
<require condition="CM23_NoTZ"/>
<require condition="GCC"/>
</condition>
<condition id="CM23_TZ_GCC">
<description>Cortex-M23 processor based device with TrustZone for the GCC Compiler</description>
<require condition="CM23_TZ"/>
<require condition="GCC"/>
</condition>
<condition id="CM33_GCC">
<description>Cortex-M33 processor based device for the GCC Compiler</description>
<require condition="CM33"/>
<require condition="GCC"/>
</condition>
<condition id="CM33_NoTZ_GCC">
<description>Cortex-M33 processor based device without TrustZone for the GCC Compiler</description>
<require condition="CM33_NoTZ"/>
<require condition="GCC"/>
</condition>
<condition id="CM33_TZ_GCC">
<description>Cortex-M33 processor based device with TrustZone for the GCC Compiler</description>
<require condition="CM33_TZ"/>
<require condition="GCC"/>
</condition>
<condition id="CM55_GCC">
<description>Cortex-M55 processor based device for the GCC Compiler</description>
<require condition="CM55"/>
<require condition="GCC"/>
</condition>
<condition id="CM55_NoTZ_GCC">
<description>Cortex-M33 processor based device without TrustZone for the GCC Compiler</description>
<require condition="CM55_NoTZ"/>
<require condition="GCC"/>
</condition>
<condition id="CM55_TZ_GCC">
<description>Cortex-M55 processor based device with TrustZone for the GCC Compiler</description>
<require condition="CM55_TZ"/>
<require condition="GCC"/>
</condition>
<condition id="CA9_DP_GCC">
<description>Cortex-A9 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
<require condition="CA9_DP"/>
<require condition="GCC"/>
</condition>
<!-- IAR compiler -->
<condition id="CM0_IAR">
<description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
<require condition="CM0"/>
<require condition="IAR"/>
</condition>
<condition id="CM3_IAR">
<description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
<require condition="CM3"/>
<require condition="IAR"/>
</condition>
<condition id="CM4_IAR">
<description>Cortex-M4 processor based device for the IAR Compiler</description>
<require condition="CM4"/>
<require condition="IAR"/>
</condition>
<condition id="CM4_FP_IAR">
<description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
<require condition="CM4_FP"/>
<require condition="IAR"/>
</condition>
<condition id="CM7_IAR">
<description>Cortex-M7 processor based device for the IAR Compiler</description>
<require condition="CM7"/>
<require condition="IAR"/>
</condition>
<condition id="CM7_SP_IAR">
<description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
<require condition="CM7_SP"/>
<require condition="IAR"/>
</condition>
<condition id="CM7_DP_IAR">
<description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
<require condition="CM7_DP"/>
<require condition="IAR"/>
</condition>
<condition id="CM23_IAR">
<description>Cortex-M23 processor based device for the IAR Compiler</description>
<require condition="CM23"/>
<require condition="IAR"/>
</condition>
<condition id="CM23_NoTZ_IAR">
<description>Cortex-M23 processor based device without TrustZone for the IAR Compiler</description>
<require condition="CM23_NoTZ"/>
<require condition="IAR"/>
</condition>
<condition id="CM23_TZ_IAR">
<description>Cortex-M23 processor based device with TrustZone for the IAR Compiler</description>
<require condition="CM23_TZ"/>
<require condition="IAR"/>
</condition>
<condition id="CM33_IAR">
<description>Cortex-M33 processor based device for the IAR Compiler</description>
<require condition="CM33"/>
<require condition="IAR"/>
</condition>
<condition id="CM33_NoTZ_IAR">
<description>Cortex-M33 processor based device without TrustZone for the IAR Compiler</description>
<require condition="CM33_NoTZ"/>
<require condition="IAR"/>
</condition>
<condition id="CM33_TZ_IAR">
<description>Cortex-M33 processor based device with TrustZone for the IAR Compiler</description>
<require condition="CM33_TZ"/>
<require condition="IAR"/>
</condition>
<condition id="CM55_IAR">
<description>Cortex-M55 processor based device for the IAR Compiler</description>
<require condition="CM55"/>
<require condition="IAR"/>
</condition>
<condition id="CM55_NoTZ_IAR">
<description>Cortex-M55 processor based device without TrustZone for the IAR Compiler</description>
<require condition="CM55_NoTZ"/>
<require condition="IAR"/>
</condition>
<condition id="CM55_TZ_IAR">
<description>Cortex-M55 processor based device with TrustZone for the IAR Compiler</description>
<require condition="CM55_TZ"/>
<require condition="IAR"/>
</condition>
<condition id="CA9_DP_IAR">
<description>Cortex-A9 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
<require condition="CA9_DP"/>
<require condition="IAR"/>
</condition>
<!-- FreeRTOS ports for the Arm Cortex core -->
<condition id="FreeRTOS Port Cortex-M0">
<description>Requirements for FreeRTOS port for Cortex-M0 and Cortex-M0+</description>
<accept condition="CM0_ARMCC"/>
<accept condition="CM0_ARMCC6"/>
<accept condition="CM0_GCC"/>
<accept condition="CM0_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M3">
<description>Requirements for FreeRTOS port for Cortex-M3</description>
<accept condition="CM3_ARMCC"/>
<accept condition="CM3_ARMCC6"/>
<accept condition="CM3_GCC"/>
<accept condition="CM3_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M3 MPU">
<description>Requirements for FreeRTOS port for Cortex-M3 using MPU</description>
<accept condition="CM3_ARMCC6"/>
<accept condition="CM3_GCC"/>
</condition>
<condition id="FreeRTOS Port Cortex-M4">
<description>Requirements for FreeRTOS port for Cortex-M4</description>
<accept condition="CM4_ARMCC"/>
<accept condition="CM4_ARMCC6"/>
<accept condition="CM4_GCC"/>
<accept condition="CM4_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M4 MPU">
<description>Requirements for FreeRTOS port for Cortex-M4 using MPU</description>
<accept condition="CM4_ARMCC6"/>
<accept condition="CM4_GCC"/>
</condition>
<condition id="FreeRTOS Port Cortex-M4 FPU">
<description>Requirements for FreeRTOS port for Cortex-M4 using FPU</description>
<accept condition="CM4_FP_ARMCC"/>
<accept condition="CM4_FP_ARMCC6"/>
<accept condition="CM4_FP_GCC"/>
<accept condition="CM4_FP_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M4 FPU MPU">
<description>Requirements for FreeRTOS port for Cortex-M4 using FPU and MPU</description>
<accept condition="CM4_FP_ARMCC"/>
<accept condition="CM4_FP_ARMCC6"/>
<accept condition="CM4_FP_GCC"/>
<accept condition="CM4_FP_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M7">
<description>Requirements for FreeRTOS port for Cortex-M7</description>
<accept condition="CM7_ARMCC"/>
<accept condition="CM7_ARMCC6"/>
<accept condition="CM7_GCC"/>
<accept condition="CM7_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M7 FPU SP">
<description>Requirements for FreeRTOS port for Cortex-M7 using FPU (SP)</description>
<accept condition="CM7_SP_ARMCC"/>
<accept condition="CM7_SP_ARMCC6"/>
<accept condition="CM7_SP_GCC"/>
<accept condition="CM7_SP_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M7 FPU DP">
<description>Requirements for FreeRTOS port for Cortex-M7 using FPU (DP)</description>
<accept condition="CM7_DP_ARMCC"/>
<accept condition="CM7_DP_ARMCC6"/>
<accept condition="CM7_DP_GCC"/>
<accept condition="CM7_DP_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M23">
<description>Requirements for FreeRTOS port for Cortex-M23</description>
<accept condition="CM23_ARMCC6"/>
<accept condition="CM23_GCC"/>
<accept condition="CM23_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M23 NoTZ">
<description>Requirements for FreeRTOS port for Cortex-M23 without TrustZone</description>
<accept condition="CM23_NoTZ_ARMCC6"/>
<accept condition="CM23_NoTZ_GCC"/>
<accept condition="CM23_NoTZ_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M23 TZ">
<description>Requirements for FreeRTOS port for Cortex-M23 with TrustZone</description>
<accept condition="CM23_TZ_ARMCC6"/>
<accept condition="CM23_TZ_GCC"/>
<accept condition="CM23_TZ_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M33">
<description>Requirements for FreeRTOS port for Cortex-M33</description>
<accept condition="CM33_ARMCC6"/>
<accept condition="CM33_GCC"/>
<accept condition="CM33_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M33 NoTZ">
<description>Requirements for FreeRTOS port for Cortex-M33 without TrustZone</description>
<accept condition="CM33_NoTZ_ARMCC6"/>
<accept condition="CM33_NoTZ_GCC"/>
<accept condition="CM33_NoTZ_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M33 TZ">
<description>Requirements for FreeRTOS port for Cortex-M33 with TrustZone</description>
<accept condition="CM33_TZ_ARMCC6"/>
<accept condition="CM33_TZ_GCC"/>
<accept condition="CM33_TZ_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M55 NoTZ">
<description>Requirements for FreeRTOS port for Cortex-M55 without TrustZone</description>
<accept condition="CM55_NoTZ_ARMCC6"/>
<accept condition="CM55_NoTZ_GCC"/>
<accept condition="CM55_NoTZ_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M55 TZ">
<description>Requirements for FreeRTOS port for Cortex-M55 with TrustZone</description>
<accept condition="CM55_TZ_ARMCC6"/>
<accept condition="CM55_TZ_GCC"/>
<accept condition="CM55_TZ_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-A9 FPU DP">
<description>Requirements for FreeRTOS port for Cortex-A9 using FPU (DP)</description>
<accept condition="CA9_DP_ARMCC"/>
<accept condition="CA9_DP_ARMCC6"/>
<accept condition="CA9_DP_GCC"/>
<accept condition="CA9_DP_IAR"/>
</condition>
<condition id="FreeRTOS Port Cortex-M v6_v7">
<description>Requirements for FreeRTOS port for Cortex-M v6 and v7</description>
<accept condition="FreeRTOS Port Cortex-M0"/>
<accept condition="FreeRTOS Port Cortex-M3"/>
<accept condition="FreeRTOS Port Cortex-M4"/>
<accept condition="FreeRTOS Port Cortex-M4 FPU"/>
<accept condition="FreeRTOS Port Cortex-M7"/>
<accept condition="FreeRTOS Port Cortex-M7 FPU SP"/>
<accept condition="FreeRTOS Port Cortex-M7 FPU DP"/>
</condition>
<condition id="FreeRTOS Port Cortex-M v6_v7 MPU">
<description>Requirements for FreeRTOS port for Cortex-M v6 and v7 using MPU</description>
<accept condition="FreeRTOS Port Cortex-M3 MPU"/>
<accept condition="FreeRTOS Port Cortex-M4 MPU"/>
<accept condition="FreeRTOS Port Cortex-M4 FPU MPU"/>
</condition>
<condition id="FreeRTOS Port Cortex-M v8">
<description>Requirements for FreeRTOS port for Cortex-M v8</description>
<accept condition="FreeRTOS Port Cortex-M23"/>
<accept condition="FreeRTOS Port Cortex-M23 NoTZ"/>
<accept condition="FreeRTOS Port Cortex-M23 TZ"/>
<accept condition="FreeRTOS Port Cortex-M33"/>
<accept condition="FreeRTOS Port Cortex-M33 NoTZ"/>
<accept condition="FreeRTOS Port Cortex-M33 TZ"/>
<accept condition="FreeRTOS Port Cortex-M55 NoTZ"/>
<accept condition="FreeRTOS Port Cortex-M55 TZ"/>
</condition>
<condition id="FreeRTOS Port Cortex-M v8 TZ">
<description>Requirements for FreeRTOS port for Cortex-M v8 with TrustZone</description>
<accept condition="FreeRTOS Port Cortex-M23 TZ"/>
<accept condition="FreeRTOS Port Cortex-M33 TZ"/>
<accept condition="FreeRTOS Port Cortex-M55 TZ"/>
</condition>
<condition id="FreeRTOS Port Cortex-A">
<description>Requirements for FreeRTOS port for Cortex-A</description>
<accept condition="FreeRTOS Port Cortex-A9 FPU DP"/>
</condition>
<condition id="FreeRTOS Port Cortex-M">
<description>Requirements for FreeRTOS port for Cortex-M</description>
<accept condition="FreeRTOS Port Cortex-M v6_v7"/>
<accept condition="FreeRTOS Port Cortex-M v8"/>
</condition>
<condition id="FreeRTOS Port">
<description>FreeRTOS ports for Arm Cortex combined</description>
<accept condition="FreeRTOS Port Cortex-A"/>
<accept condition="FreeRTOS Port Cortex-M"/>
</condition>
<!-- Conditions for RTOS::FreeRTOS components -->
<condition id="FreeRTOS Message or Stream Buffer API">
<description>FreeRTOS Message or Stream Buffer component</description>
<accept Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Message Buffer"/>
<accept Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Stream Buffer"/>
</condition>
<condition id="FreeRTOS Core CA">
<description>Requirements for FreeRTOS Core for Cortex-A</description>
<require condition="FreeRTOS Port Cortex-A"/>
<require Cclass="Device" Cgroup="Startup"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Heap"/>
</condition>
<condition id="FreeRTOS Core CM">
<description>Requirements for FreeRTOS Core for Cortex-M</description>
<require condition="FreeRTOS Port Cortex-M"/>
<require Cclass="Device" Cgroup="Startup"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Heap"/>
</condition>
<condition id="FreeRTOS Core CM v6_v7 MPU">
<description>Requirements for FreeRTOS Core with MPU support for Cortex-M v6 and v7</description>
<require condition="FreeRTOS Port Cortex-M v6_v7 MPU"/>
<require Cclass="Device" Cgroup="Startup"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Heap"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Event Groups"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Timers"/>
<require condition="FreeRTOS Message or Stream Buffer API"/>
</condition>
<condition id="FreeRTOS Core TZ">
<description>Requirements for FreeRTOS Core with TrustZone support</description>
<require condition="FreeRTOS Port Cortex-M v8 TZ"/>
<require Cclass="Device" Cgroup="Startup"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Heap"/>
</condition>
<condition id="FreeRTOS Core TZ MPU">
<description>Requirements for FreeRTOS Core with TrustZone and MPU support</description>
<require condition="FreeRTOS Port Cortex-M v8 TZ"/>
<require Cclass="Device" Cgroup="Startup"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Heap"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Event Groups"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Timers"/>
<require condition="FreeRTOS Message or Stream Buffer API"/>
</condition>
<condition id="FreeRTOS Config Native">
<description>Components required for FreeRTOS Config Native variant</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS Config CMSIS RTOS2">
<description>Components required for FreeRTOS Config CMSIS RTOS2 variant</description>
<require condition="FreeRTOS Port"/>
<require Cclass="CMSIS" Cgroup="RTOS2" Csub="FreeRTOS"/>
</condition>
<condition id="FreeRTOS Coroutines">
<description>Components required for FreeRTOS Coroutines</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS Event Groups">
<description>Components required for FreeRTOS Event Groups</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS Heap">
<description>Components required for FreeRTOS Heap</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS Message Buffer">
<description>Components required for FreeRTOS Message Buffer</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS Stream Buffer">
<description>Components required for FreeRTOS Stream Buffer</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS Timers">
<description>Components required for FreeRTOS Timers</description>
<require condition="FreeRTOS Port"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
</condition>
<condition id="FreeRTOS TrustZone">
<description>Components required for FreeRTOS TrustZone</description>
<require condition="FreeRTOS Port Cortex-M v8 TZ"/>
<!-- TrustZone Secure Context is a standalone component -->
<deny Cclass="CMSIS" Cgroup="RTOS" Csub="FreeRTOS"/>
<deny Cclass="CMSIS" Cgroup="RTOS2" Csub="FreeRTOS"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Coroutines"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Heap"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Event Groups"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Message Buffer"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Stream Buffer"/>
<deny Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Timers"/>
</condition>
<condition id="CMSIS RTOS FreeRTOS">
<description>Components required for CMSIS RTOS API on top of FreeRTOS</description>
<require condition="FreeRTOS Port"/>
<require Cclass="CMSIS" Cgroup="RTOS2" Csub="FreeRTOS"/>
</condition>
<condition id="CMSIS RTOS2 FreeRTOS CortexM">
<description>Components required for CMSIS RTOS2 API on top of FreeRTOS for Cortex-M</description>
<require condition="FreeRTOS Port Cortex-M"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config" Cvariant="CMSIS RTOS2"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Event Groups"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Timers"/>
</condition>
<condition id="CMSIS RTOS2 FreeRTOS CortexA">
<description>Components required for CMSIS RTOS2 API on top of FreeRTOS for Cortex-A</description>
<require condition="FreeRTOS Port Cortex-A"/>
<require Cclass="Device" Cgroup="IRQ Controller"/>
<require Cclass="Device" Cgroup="OS Tick"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Config" Cvariant="CMSIS RTOS2"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Core"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Event Groups"/>
<require Cclass="RTOS" Cbundle="FreeRTOS" Cgroup="Timers"/>
</condition>
</conditions>
<components>
<!-- CMSIS-RTOS FreeRTOS component -->
<component Cclass="CMSIS" Cgroup="RTOS" Csub="FreeRTOS" Cversion="10.4.6" Capiversion="1.0.0" condition="CMSIS RTOS FreeRTOS">
<description>CMSIS-RTOS implementation for Cortex-M based on FreeRTOS</description>
<RTE_Components_h>
#define RTE_CMSIS_RTOS /* CMSIS-RTOS */
#define RTE_CMSIS_RTOS_FreeRTOS /* CMSIS-RTOS FreeRTOS */
</RTE_Components_h>
<files>
<file category="header" name="CMSIS/RTOS2/FreeRTOS/Include1/cmsis_os.h"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/cmsis_os1.c"/>
</files>
</component>
<!-- CMSIS-RTOS2 FreeRTOS component -->
<component Cclass="CMSIS" Cgroup="RTOS2" Csub="FreeRTOS" Cvariant="Cortex-M" Cversion="10.4.6" Capiversion="2.1.3" condition="CMSIS RTOS2 FreeRTOS CortexM">
<description>CMSIS-RTOS2 implementation for Cortex-M based on FreeRTOS</description>
<RTE_Components_h>
#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
#define RTE_CMSIS_RTOS2_FreeRTOS /* CMSIS-RTOS2 FreeRTOS */
</RTE_Components_h>
<files>
<file category="doc" name="CMSIS/Documentation/General/html/index.html"/>
<file category="header" name="CMSIS/RTOS2/FreeRTOS/Include/freertos_mpool.h"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/cmsis_os2.c"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/ARM/clib_arm.c" condition="ARMCC"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/ARM/clib_arm.c" condition="ARMCC6"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/os_systick.c"/>
</files>
</component>
<component Cclass="CMSIS" Cgroup="RTOS2" Csub="FreeRTOS" Cvariant="Cortex-A" Cversion="10.4.6" Capiversion="2.1.3" condition="CMSIS RTOS2 FreeRTOS CortexA">
<description>CMSIS-RTOS2 implementation for Cortex-A based on FreeRTOS</description>
<RTE_Components_h>
#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
#define RTE_CMSIS_RTOS2_FreeRTOS /* CMSIS-RTOS2 FreeRTOS */
</RTE_Components_h>
<files>
<file category="doc" name="CMSIS/Documentation/General/html/index.html"/>
<file category="header" name="CMSIS/RTOS2/FreeRTOS/Include/freertos_mpool.h"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/cmsis_os2.c"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/ARM/clib_arm.c" condition="ARMCC"/>
<file category="source" name="CMSIS/RTOS2/FreeRTOS/Source/ARM/clib_arm.c" condition="ARMCC6"/>
<file category="source" attr="config" name="CMSIS/RTOS2/FreeRTOS/Source/handlers.c" version="9.1.0"/>
</files>
</component>
<bundle Cbundle="FreeRTOS" Cclass="RTOS" Cversion="10.4.6">
<description>FreeRTOS Real Time Kernel</description>
<doc>https://www.freertos.org/Documentation/FreeRTOS_Reference_Manual_V10.0.0.pdf</doc>
<component Cgroup="Core" Cvariant="Cortex-M" isDefaultVariant="true" condition="FreeRTOS Core CM">
<description>Core API (Kernel, Tasks, Semaphores, Mutexes, Queues) for Cortex-M</description>
<RTE_Components_h>
#define RTE_RTOS_FreeRTOS_CORE /* RTOS FreeRTOS Core */
</RTE_Components_h>
<files>
<file category="include" name="Source/include/"/>
<file category="header" name="Source/include/FreeRTOS.h"/>
<file category="header" name="Source/include/queue.h"/>
<file category="header" name="Source/include/semphr.h"/>
<file category="header" name="Source/include/task.h"/>
<file category="source" name="Source/list.c"/>
<file category="source" name="Source/queue.c"/>
<file category="source" name="Source/tasks.c"/>
<file category="include" condition="CM0_ARMCC" name="Source/portable/RVDS/ARM_CM0/"/>
<file category="source" condition="CM0_ARMCC" name="Source/portable/RVDS/ARM_CM0/port.c"/>
<file category="include" condition="CM3_ARMCC" name="Source/portable/RVDS/ARM_CM3/"/>
<file category="source" condition="CM3_ARMCC" name="Source/portable/RVDS/ARM_CM3/port.c"/>
<file category="include" condition="CM4_ARMCC" name="Source/portable/RVDS/ARM_CM3/"/>
<file category="source" condition="CM4_ARMCC" name="Source/portable/RVDS/ARM_CM3/port.c"/>
<file category="include" condition="CM4_FP_ARMCC" name="Source/portable/RVDS/ARM_CM4F/"/>
<file category="source" condition="CM4_FP_ARMCC" name="Source/portable/RVDS/ARM_CM4F/port.c"/>
<file category="include" condition="CM7_ARMCC" name="Source/portable/RVDS/ARM_CM3/"/>
<file category="source" condition="CM7_ARMCC" name="Source/portable/RVDS/ARM_CM3/port.c"/>
<file category="include" condition="CM7_DP_ARMCC" name="Source/portable/RVDS/ARM_CM7/r0p1/"/>
<file category="source" condition="CM7_DP_ARMCC" name="Source/portable/RVDS/ARM_CM7/r0p1/port.c"/>
<file category="include" condition="CM7_SP_ARMCC" name="Source/portable/RVDS/ARM_CM7/r0p1/"/>
<file category="source" condition="CM7_SP_ARMCC" name="Source/portable/RVDS/ARM_CM7/r0p1/port.c"/>
<file category="include" condition="CM0_ARMCC6" name="Source/portable/GCC/ARM_CM0/"/>
<file category="source" condition="CM0_ARMCC6" name="Source/portable/GCC/ARM_CM0/port.c"/>
<file category="include" condition="CM3_ARMCC6" name="Source/portable/GCC/ARM_CM3/"/>
<file category="source" condition="CM3_ARMCC6" name="Source/portable/GCC/ARM_CM3/port.c"/>
<file category="include" condition="CM4_ARMCC6" name="Source/portable/GCC/ARM_CM3/"/>
<file category="source" condition="CM4_ARMCC6" name="Source/portable/GCC/ARM_CM3/port.c"/>
<file category="include" condition="CM4_FP_ARMCC6" name="Source/portable/GCC/ARM_CM4F/"/>
<file category="source" condition="CM4_FP_ARMCC6" name="Source/portable/GCC/ARM_CM4F/port.c"/>
<file category="include" condition="CM7_ARMCC6" name="Source/portable/GCC/ARM_CM3/"/>
<file category="source" condition="CM7_ARMCC6" name="Source/portable/GCC/ARM_CM3/port.c"/>
<file category="include" condition="CM7_DP_ARMCC6" name="Source/portable/GCC/ARM_CM7/r0p1/"/>
<file category="source" condition="CM7_DP_ARMCC6" name="Source/portable/GCC/ARM_CM7/r0p1/port.c"/>
<file category="include" condition="CM7_SP_ARMCC6" name="Source/portable/GCC/ARM_CM7/r0p1/"/>
<file category="source" condition="CM7_SP_ARMCC6" name="Source/portable/GCC/ARM_CM7/r0p1/port.c"/>
<file category="include" condition="CM23_ARMCC6" name="Source/portable/GCC/ARM_CM23_NTZ/non_secure/"/>
<file category="source" condition="CM23_ARMCC6" name="Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c"/>
<file category="source" condition="CM23_ARMCC6" name="Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c"/>
<file category="include" condition="CM33_ARMCC6" name="Source/portable/GCC/ARM_CM33_NTZ/non_secure/"/>
<file category="source" condition="CM33_ARMCC6" name="Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c"/>
<file category="source" condition="CM33_ARMCC6" name="Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c"/>
<file category="include" condition="CM55_ARMCC6" name="Source/portable/GCC/ARM_CM33_NTZ/non_secure/"/>
<file category="source" condition="CM55_ARMCC6" name="Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c"/>
<file category="source" condition="CM55_ARMCC6" name="Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c"/>
<file category="include" condition="CM0_GCC" name="Source/portable/GCC/ARM_CM0/"/>
<file category="source" condition="CM0_GCC" name="Source/portable/GCC/ARM_CM0/port.c"/>
<file category="include" condition="CM3_GCC" name="Source/portable/GCC/ARM_CM3/"/>
<file category="source" condition="CM3_GCC" name="Source/portable/GCC/ARM_CM3/port.c"/>
<file category="include" condition="CM4_GCC" name="Source/portable/GCC/ARM_CM3/"/>
<file category="source" condition="CM4_GCC" name="Source/portable/GCC/ARM_CM3/port.c"/>
<file category="include" condition="CM4_FP_GCC" name="Source/portable/GCC/ARM_CM4F/"/>
<file category="source" condition="CM4_FP_GCC" name="Source/portable/GCC/ARM_CM4F/port.c"/>
<file category="include" condition="CM7_GCC" name="Source/portable/GCC/ARM_CM3/"/>
<file category="source" condition="CM7_GCC" name="Source/portable/GCC/ARM_CM3/port.c"/>