simulate et al. raise a spurious/misleading exception when inputs are exhausted

[cemerick]

Example:

> simulate (register 8) [1, 2, 3]
"[8,1,2,3*** Exception: X: finite list

Absent the background/context, this output looks like something's gone wrong.

Per @christiaanb in irc:

.:christiaanb:. yeah, that's to be expected
.:christiaanb:. because in principle you could be simulating multiple clock domains, so you could have fewer or more samples on the output with regards to the input
.:christiaanb:. but perhaps we should be generating a nicer exception

Seems like a reasonable beginner contribution. I'll take a shot at a PR, perhaps.

Q: should an exception be raised at all in this case? It seems that a finite input here is a reasonable expectation.